CD54HC4040 Datasheet, PDF (5/15 Pages) Texas Instruments – High-Speed CMOS Logic 12-Stage Binary Counter

CD54HC4040, CD74HC4040, CD54HCT4040, CD74HCT4040
DC Electrical Specifications (Continued)
TEST
CONDITIONS
25^oC
-40^oC TO 85^oC -55^oC TO 125^oC
PARAMETER SYMBOL V_I (V) I_O (mA) V_CC (V) MIN TYP MAX MIN MAX MIN MAX UNITS
HCT TYPES
High Level Input
V_IH
-
Voltage
-
4.5 to 5.5 2
-
-
2
-
2
-
V
Low Level Input
V_IL
-
-
4.5 to 5.5 -
-
0.8
-
0.8
-
0.8
V
Voltage
High Level Output
V_OH V_IH or V_IL -0.02
4.5
4.4
-
-
4.4
-
4.4
-
V
Voltage
CMOS Loads
High Level Output
Voltage
TTL Loads
-4
4.5
3.98
-
-
3.84
-
3.7
-
V
Low Level Output
V_OL V_IH or V_IL 0.02
4.5
Voltage
CMOS Loads
-
-
0.1
-
0.1
-
0.1
V
Low Level Output
Voltage
TTL Loads
4
4.5
-
-
0.26
-
0.33
-
0.4
V
Input Leakage
Current
I_I
V_CC and
0
GND
5.5
-
-
±0.1
-
±1
-
±1
µA
Quiescent Device
Current
I_CC
V_CC or
0
GND
5.5
-
-
8
-
80
-
160
µA
Additional Quies-
∆I_CC
cent Device Current (Note 2)
V_CC
-2.1
Per Input Pin: 1 Unit
Load
-
4.5 to 5.5 -
100 360
-
450
-
490
µA
NOTE:
2. For dual-supply systems theoretical worst case (V_I = 2.4V, V_CC = 5.5V) specification is 1.8mA.
HCT Input Loading Table
INPUT
UNIT LOADS
MR
0.65
CP
0.5
NOTE:
360µA
mUanxitaLto2a5d^{oiCs.∆ICC}
limit
specified
in
DC
Electrical
Table,
e.g.,
Prerequisite for Switching Specifications
PARAMETER
HC TYPES
Maximum Input Pulse
Frequency
Input Pulse Width
SYMBOL V_CC (V)
f_MAX
2
4.5
6
t_W
2
4.5
6
25^oC
MIN
MAX
6
-
30
-
35
-
80
-
16
-
14
-
-40^oC TO 85^oC
MIN
MAX
-55^oC TO 125^oC
MIN
MAX
UNITS
5
-
4
-
MHz
25
-
20
-
MHz
29
-
24
-
MHz
100
-
120
-
ns
20
-
24
-
ns
17
-
20
-
ns
5