BQ24193_15 Datasheet, PDF (8/49 Pages) Texas Instruments – bq24193 I2C Controlled 4.5-A Single Cell USB/Adapter Charger with Narrow VDC Power Path Management and USB OTG

bq24193
SLUSBG7 – DECEMBER 2014
www.ti.com
Electrical Characteristics (continued)
V_{VBUS_UVLOZ} < V_VBUS < V_ACOV and V_VBUS > V_BAT + V_SLEEP, T_J = –40°C to 125°C and T_J = 25°C for typical values unless other
noted.
PARAMETER
TEST CONDITIONS
MIN TYP
MAX UNIT
INPUT VOLTAGE/CURRENT REGULATION
V_{INDPM_REG_ACC} Input voltage regulation accuracy
USB100
–2%
85
2%
100 mA
I_{USB_DPM}
USB Input current regulation limit, VBUS = 5 V,
current pulled from SW
USB150
USB500
125
150 mA
440
500 mA
USB900
750
900 mA
I_{ADPT_DPM}
Input current regulation accuracy
I_{IN_START}
Input current limit during system start up
K_ILIM
I_IN = K_ILIM/R_ILIM
BAT OVER-VOLTAGE PROTECTION
Input current limit 1.5 A
VSYS < 2.2 V
IINDPM = 1.5 A
1.4 1.5
100
440 485
1.6
A
mA
530 A x Ω
V_BATOVP
V_{BATOVP_HYST}
t_BATOVP
Battery over-voltage threshold
Battery over-voltage hysteresis
Battery over-voltage deglitch time to disable
charge
V_BAT rising, as percentage of V_{BAT_REG}
V_BAT falling, as percentage of V_{BAT_REG}
104%
2%
1
µs
THERMAL REGULATION AND THERMAL SHUTDOWN
T_{Junction_REG}
T_SHUT
T_{SHUT_HYS}
Junction temperature regulation accuracy
Thermal shutdown rising temperature
Thermal shutdown hysteresis
Thermal shutdown rising deglitch
REG06[1:0] = 11
Temperature increasing
Temperature increasing delay
115 120
160
30
1
125 °C
°C
°C
ms
Thermal shutdown falling deglitch
Temperature decreasing delay
1
ms
JEITA THERMISTER COMPARATOR (bq24193)
V_T1
T1 (0°C) threshold, Charge suspended T1 below
this temperature.
V_TS rising, As percentage to V_REGN
70.2%
70.8
%
71.4%
V_{T1_HYS}
Charge back to I_CHG/2 and 4.2 V above this
temperature
Hysteresis, V_TS falling
0.6%
V_T2
T2 (10°C) threshold, Charge back to I_CHG/2 and
4.2 V below this temperature
V_TS rising, as percentage of V_REGN
68.0%
68.6
%
69.2%
V_{T2_HYS}
Charge back to I_CHG and 4.2 V above this
temperature
Hysteresis, V_TS falling
0.8%
V_T3
T3 (45°C) threshold, Charge back to I_CHG and 4.05
V above this temperature
V_TS falling, as percentage of V_REGN
55.5%
56.1
%
56.7%
V_{T3_HYS}
Charge back to I_CHG and 4.2 V below this
temperature
Hysteresis, V_TS rising
0.8%
V_T5
T5 (60°C) threshold, charge suspended above this
temperature
V_TS falling, as percentage of V_REGN
47.6%
48.1
%
48.6%
V_{T5_HYS}
Charge back to I_CHG and 4.05 V below this
temperature
Hysteresis, V_TS rising
1.2%
CHARGE OVER-CURRENT COMPARATOR
I_{HSFET_OCP}
HSFET over-current threshold
I_{BATFET_OCP}
System over load threshold
CHARGE UNDER-CURRENT COMPARATOR (CYCLE-BY-CYCLE)
5.3
7
A
9
A
V_{LSFET_UCP}
LSFET charge under-current falling threshold
PWM OPERATION
From sync mode to non-sync mode
100
mA
F_SW
D_MAX
PWM Switching frequency, and digital clock
Maximum PWM duty cycle
V_{BTST_REFRESH} Bootstrap refresh comparator threshold
VBTST-VSW when LSFET refresh pulse is
requested, VBUS = 5 V
VBTST-VSW when LSFET refresh pulse is
requested, VBUS > 6 V
1300 1500
97%
3.6
4.2
1700 kHz
V
BOOST MODE OPERATION
V_{OTG_REG}
V_{OTG_REG_ACC}
OTG output voltage
OTG output voltage accuracy
I(VBUS) = 0
I(VBUS) = 0
5.00
–2%
V
2%
8
Submit Documentation Feedback
Product Folder Links: bq24193
Copyright © 2014, Texas Instruments Incorporated