CC110L Datasheet, PDF (76/85 Pages) Texas Instruments – Value Line Transceiver

CC110L
0x38 (0xF8): PKTSTATUS - Current GDOx Status and Packet Status
Bit Field Name
7 CRC_OK
6 CS
5
4 CCA
3 SFD
2 GDO2
1
0 GDO0
Reset
R/W
R
R
R
R
R
R0
R
Description
The last CRC comparison matched. Cleared when entering/restarting RX
mode.
Carrier sense. Cleared when entering IDLE mode.
Reserved
Channel is clear
Start of Frame Delimiter. This bit is asserted when sync word has been
received and de-asserted at the end of the packet. It will also de-assert
when a packet is discarded due to address or maximum length filtering or
the radio enters RXFIFO_OVERFLOW state.
Current GDO2 value. Note: the reading gives the non-inverted value
irrespective of what IOCFG2.GDO2_INV is programmed to.
It is not recommended to check for PLL lock by reading PKTSTATUS[2]
with GDO2_CFG=0x0A.
Not used
Current GDO0 value. Note: the reading gives the non-inverted value
irrespective of what IOCFG0.GDO0_INV is programmed to.
It is not recommended to check for PLL lock by reading PKTSTATUS[0]
with GDO0_CFG=0x0A.
0x3A (0xFA): TXBYTES - Underflow and Number of Bytes
Bit Field Name
7 TXFIFO_UNDERFLOW
6:0 NUM_TXBYTES
Reset R/W Description
R
R
Number of bytes in TX FIFO
0x3B (0xFB): RXBYTES - Overflow and Number of Bytes
Bit Field Name
7 RXFIFO_OVERFLOW
6:0 NUM_RXBYTES
Reset R/W Description
R
R
Number of bytes in RX FIFO
28 Development Kit Ordering Information
Orderable Evaluation Module
CC11xLDK-868-915
CC11xLEMK-433
RF BoosterPack for MSP430
LaunchPad
Description
CC11xL Development Kit, 868/915 MHz
CC11xL Evaluation Module Kit, 433 MHz
Plug-in boards for the MSP430 Value Line LaunchPad
(MSP-EXP430G2), 868/915 MHz
Figure 25: Development Kit Ordering Information
Minimum Order Quantity
1
1
1
SWRS109A
Page 76 of 78