CC110L Datasheet, PDF (69/85 Pages) Texas Instruments – Value Line Transceiver

CC110L
0x1B: AGCCTRL2 - AGC Control
Bit Field Name
Reset
7:6 MAX_DVGA_GAIN[1:0] 0 (00)
5:3 MAX_LNA_GAIN[2:0] 0 (000)
2:0 MAGN_TARGET[2:0] 3 (011)
R/W Description
R/W Reduces the maximum allowable DVGA gain.
Setting Allowable DVGA settings
0 (00)
All gain settings can be used
1 (01)
The highest gain setting cannot be used
2 (10)
The 2 highest gain settings cannot be used
3 (11)
The 3 highest gain settings cannot be used
R/W Sets the maximum allowable LNA + LNA 2 gain relative to the maximum
possible gain.
Setting Maximum allowable LNA + LNA 2 gain
0 (000) Maximum possible LNA + LNA 2 gain
1 (001) Approx. 2.6 dB below maximum possible gain
2 (010) Approx. 6.1 dB below maximum possible gain
3 (011) Approx. 7.4 dB below maximum possible gain
4 (100) Approx. 9.2 dB below maximum possible gain
5 (101) Approx. 11.5 dB below maximum possible gain
6 (110) Approx. 14.6 dB below maximum possible gain
7 (111) Approx. 17.1 dB below maximum possible gain
R/W These bits set the target value for the averaged amplitude from the digital
channel filter (1 LSB = 0 dB).
Setting Target amplitude from channel filter
0 (000) 24 dB
1 (001) 27 dB
2 (010) 30 dB
3 (011) 33 dB
4 (100) 36 dB
5 (101) 38 dB
6 (110) 40 dB
7 (111) 42 dB
SWRS109A
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