LM3S8538 Datasheet, PDF (72/590 Pages) Texas Instruments – Stellaris® LM3S8538 Microcontroller

System Control
■ System clock derived from PLL or other clock source
■ Enabling/disabling of oscillators and PLL
■ Clock divisors
■ Crystal input selection
Figure 6-5 on page 73 shows the logic for the main clock tree. The peripheral blocks are driven by
the system clock signal and can be individually enabled/disabled. The ADC clock signal is
automatically divided down to 16 MHz for proper ADC operation.
Note: When the ADC module is in operation, the system clock must be at least 16 MHz.
72
June 22, 2010
Texas Instruments-Production Data