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TLC2933A Datasheet, PDF (7/19 Pages) Texas Instruments – HIGH PERFORMANCE PHASE LOCKED LOOP | |||
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TLC2933A
HIGH PERFORMANCE PHASE LOCKED LOOP
SLES149 â OCTOBER 2005
electrical characteristics, VDD = 3.3 V, TA = 25°C (unless otherwise noted)
VCO section
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX UNIT
VOH
High level output voltage
IOH = â2 mA
2.64
V
VOL
Low level output voltage
IOL = 2 mA
0.33
V
VTH
Input threshold voltage at select, VCO inhibit
1.05
1.65
2.25
V
II
Input current at Select, VCO inhibit
VI = VDD or GND
±1
µA
ZI(VCOIN) VCO IN input impedance
VCO IN = 1/2 VDD
10
Mâ¦
IDD(INH) VCO supply current (inhibit)
See Note 10
0.44
1
µA
IDD(VCO) VCO supply current
See Note 11
14.7
28
mA
NOTES: 10. Current into VCO VDD, when VCO INHIBIT = high, PFD is inhibited.
11. Current into VCO VDD, when VCO IN = 1/2 VDD, RBIAS = 3.3 kâ¦, VCOOUT = 15-pF Load, VCO INHIBIT = GND, and
PFD INHIBIT = GND.
PFD section
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX UNIT
VOH
High level output voltage
IOH = â2 mA
2.97
V
VOL
Low level output voltage
IOL = 2 mA
0.2 V
IOZ
High impedance state output current
PFD inhibit = high, VO = VDD or GND
±1 µA
VIH
High level input voltage at FinâA, FinâB
2.1
V
VIL
Low level input voltage at FinâA, FinâB
0.5 V
VTH
Input threshold voltage at PFD inhibit
1.05
1.65
2.25
CIN
Input capacitance at FinâA, FinâB
5.6
pF
ZIN
Input impedance at FinâA, FinâB
10
Mâ¦
IDD(Z)
High impedance state PFD supply current See Note 12
1 µA
IDD(PFD) PFD supply current
See Note 13
3 mA
NOTES: 12. The current into LOGIC VDD when FINâA and FINâB = ground, PFD INHIBIT = VDD, PFD OUT open, and VCO OUT is inhibited.
13. The current into LOGIC VDD when FINâA = 1 MHz and FINâB = 1 MHz (VI(PP) = 3.3 V, rectangular wave), PFD INHIBIT = GND,
PFD OUT open, and VCO OUT is inhibited.
operation characteristics, VDD = 3.3 V, TA = 25°C (unless otherwise noted)
VCO section
PARAMETER
TEST CONDITIONS
MIN TYP MAX UNIT
fOSC
fstb
Operation oscillation frequency
Time to stable oscillation (see Note 14)
RBIAS = 3.3 kâ¦, VCO IN = 1/2 VDD
35
55
80 MHz
10 µs
tr
tf
fDUTY
α (fOSC)
Rise time
Fall time
Duty cycle at VCO OUT
Temperature coefficient of oscillation
frequency
CL = 15 pF
CL = 15 pF
RBIAS = 3.3 kâ¦, VCO IN = 1/2 VDD
VCO IN = 1/2 VDD, TA = â20°C to 75°C
45%
8.3
6.7
50%
â0.232
14
12
55%
ns
ns
%/°C
kSVS(fOSC) Supply voltage coefficient of oscillation
frequency
VCO IN = 1/2 VDD, VDD = 4.75 V to 5.25 V
0.002
%/m
V
Jitter absolute (see Note 15)
PLL jitter, N = 128
211
ps
NOTES: 14. The time period to the stable VCO oscillation frequency after the VCO INHIBIT terminal is changed to a low level.
15. Jitter performance is highly dependent on circuit layout and external device characteristics. The jitter specification was made with
a carefully deigned PCB with no device socket.
TI.COM
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