SN74F161A_07 Datasheet, PDF (7/17 Pages) Texas Instruments – SYNCHRONOUS 4-BIT BINARY COUNTER

SN74F161A
SYNCHRONOUS 4-BIT BINARY COUNTER
SDFS056B – MARCH 1987 – REVISED AUGUST 2001
timing requirements over recommended ranges of supply voltage and operating free-air
temperature (unless otherwise noted)
fclock Clock frequency
CLK high or low (loading)
tw
Pulse duration
CLK (counting)
CLR low
Data before CLK↑
tsu
Setup time
LOAD before CLK↑
ENP and ENT before CLK↑
Data after CLK↑
th
Hold time
LOAD after CLK↑
ENP and ENT after CLK↑
tsu
Inactive-state setup time, CLR high before CLK↑^†
† _{Inactive-state setup time also is referred to as recovery time.}
High
Low
High or low
High
Low
High
Low
High or low
High
Low
High or low
VCC = 5 V,
TA = 25°C
MIN MAX
0 100
5
4
6
5
5
11
8.5
11
5
2
2
0
0
6
MIN MAX
0
90
5
4
7
5
5
11.5
9.5
11.5
5
2
2
0
0
6
UNIT
MHz
ns
ns
ns
ns
switching characteristics (see Note 4)
PARAMETER
FROM
(INPUT)
TO
(OUTPUT)
VCC = 5 V,
CL = 50 PF,
RL = 500 Ω,
TA = 25°C
MIN TYP MAX
VCC = 4.5 V TO 5.5 V,
CL = 50 PF,
RL = 500 Ω,
TA = MIN TO MAX^‡
MIN
MAX
fmax
100 120
90
tPLH
tPHL
CLK (LOAD high)
Any Q
2.7 5.1 7.5
2.7 7.1
10
2.7
8.5
2.7
11
tPLH
tPHL
CLK (LOAD low)
Any Q
3.2 5.6 8.5
3.2 5.6 8.5
3.2
9.5
3.2
9.5
tPLH
CLK
tPHL
RCO
4.2 9.6
14
4.2
15
4.2 9.6
14
4.2
15
tPLH
tPHL
ENT
RCO
1.7 4.1 7.5
1.7 4.1 7.5
1.7
8.5
1.7
8.5
tPHL
CLR
Any Q
RCO
4.7 8.6
12
3.7 7.6 10.5
4.7
13
3.7
11.5
‡ _{For conditions shown as MIN or MAX, use the appropriate value specified under recommended operating conditions.}
NOTE 4: Load circuits and waveforms are shown in Figure 1.
UNIT
MHz
ns
ns
ns
ns
ns
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