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CD54HC173_08 Datasheet, PDF (7/20 Pages) Texas Instruments – High-Speed CMOS Logic Quad D-Type Flip-Flop, Three-State
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CD54HC173, CD74HC173, CD54HCT173, CD74HCT173
Prerequisite For Switching Specifications
PARAMETER
HC TYPES
Maximum Clock Frequency
MR Pulse Width
Clock Pulse Width
Set-up Time, Data to Clock
and E to Clock
Hold Time, Data to Clock
Hold Time, E to Clock
Removal Time, MR to Clock
HCT TYPES
Maximum Clock Frequency
MR Pulse Width
Clock Pulse Width
Set-up Time, E to Clock
Set-up Time, Data to Clock
Hold Time, Data to Clock
Hold Time, E to Clock
Removal Time, MR to Clock
SYMBOL VCC (V)
fMAX
2
4.5
6
tw
2
4.5
6
tw
2
4.5
6
tSU
2
4.5
6
tH
2
4.5
6
tH
2
4.5
6
tREM
2
4.5
6
fMAX
4.5
tw
4.5
tw
4.5
tSU
4.5
tSU
4.5
tH
4.5
tH
4.5
tREM
4.5
25oC
MIN
MAX
6
-
30
-
35
-
80
-
16
-
14
-
80
-
16
-
14
-
60
-
12
-
10
-
3
-
3
-
3
-
0
-
0
-
0
-
60
-
12
-
10
-
20
-
15
-
25
-
12
-
18
-
0
-
0
-
12
-
-40oC TO 85oC
MIN
MAX
-55oC TO 125oC
MIN
MAX
UNITS
5
-
4
-
MHz
24
-
20
-
MHz
28
-
24
-
MHz
100
-
120
-
ns
20
-
24
-
ns
17
-
20
-
ns
100
-
120
-
ns
20
-
24
-
ns
17
-
20
-
ns
75
-
90
-
ns
15
-
18
-
ns
13
-
15
-
ns
3
-
3
-
ns
3
-
3
-
ns
3
-
3
-
ns
0
-
0
-
ns
0
-
0
-
ns
0
-
0
-
ns
75
-
90
-
ns
15
-
18
-
ns
13
-
15
-
ns
16
-
13
-
MHz
19
-
22
-
ns
31
-
38
-
ns
15
-
18
-
ns
23
-
27
-
ns
0
-
0
-
ns
0
-
0
-
ns
15
-
18
-
ns
7
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