AFE7222_15 Datasheet, PDF (7/106 Pages) Texas Instruments – Analog Front End Wideband Mixed-Signal Transceiver

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AFE7222
AFE7225
SLOS711B – NOVEMBER 2011 – REVISED MARCH 2012
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Table 2-2. Pin Configuration: LVDS Input/Output Mode (continued)
PIN
NAME
CLKINP
DVDD18_CLK
AVDD3_DAC
IOUTP_A_DAC
IOUTN_A_DAC
AVDD3_DAC
IOUTP_B_DAC
IOUTN_B_DAC
AVDD3_DAC
BIASJ
DVDD18_DAC
AUXDAC_A
AUXDAC_B
AVDD3_AUX
AUXADC_A
AUXADC_B
AVDD18_ADC
DAC_DATA_11
DAC_DATA_10
DAC_DATA_9
DAC_DATA_8
DAC_FCLKINP
DAC_FCLKINN
DVDD18
DAC_DCLKINP
DAC_DCLKINN
DACB_DATA_0P
DACB_DATA_0N
DACB_DATA_1P
DACB_DATA_1N
SYNCINP
SYNCINN
DVDD18
ADCB_DATA_1N
ADCB_DATA_1P
ADCB_DATA_0N
ADCB_DATA_0P
DESCRIPTION
main clock input, positive side if differential mode, RX side if single-ended 2 clock mode
1.8V supply for Clocking circuit
3V supply for TX DACs
TX DAC channel A current output, positive (current sink DACs)
TX DAC channel A current output, negative (current sink DACs)
3V supply for TX DACs
TX DAC channel B current output, positive (current sink DACs)
TX DAC channel B current output, negative (current sink DACs)
3V supply for TX DACs
sets the TX DAC output current (resistor from pin to ground). Use 960 Ohm to set a full scale current of
20 mA.
1.8V DAC digital supply
auxiliary DAC channel A output, current sourcing up to 7.5mA (SPI programmable)
auxiliary DAC channel B output, current sourcing up to 7.5mA (SPI programmable)
3V supply for auxiliary ADC/DACs
auxiliary ADC channel A input
auxiliary ADC channel B input
1.8V supply for RX ADCs
LVDS Wire 1 data input for Channel A TX data – inactive in 1-wire mode, LSB byte in 2-wire mode
Positive
Negative
LVDS Wire 0 data input for Channel A TX data – active in 1-wire mode, MSB byte in 2-wire mode
Positive
Negative
LVDS frame clock input
Positive
Negative
1.8V supply for digital interface
LVDS bit clock input
Positive
Negative
LVDS Wire 0 data input for Channel B TX data – active in 1-wire mode, LSB byte in 2-wire mode
Positive
Negative
LVDS Wire 1 data input for Channel B TX data – inactive in 1-wire mode, MSB byte in 2-wire mode
Positive
Negative
LVDS SYNC input – Used to reset internal clock dividers and reset TX data FIFO pointer
Positive
Negative
1.8V supply for digital interface
LVDS Wire 1 data output for Channel B RX data – inactive in 1-wire mode, MSB byte in 2-wire mode
Positive
Negative
LVDS Wire 0 data output for Channel B RX data – active in 1-wire mode, LSB byte in 2-wire mode
Positive
Negative
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DEVICE INFORMATION
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