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74HC194N Datasheet, PDF (7/19 Pages) Texas Instruments – High-Speed CMOS Logic 4-Bit Bidirectional Universal Shift Register
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Test Circuits and Waveforms
INPUT LEVEL
CP
10%
Q
tr
90%
VS
tW
tf
VS
10%
tPHL
VS
tTHL
VS
GND
tPLH
90%
VS
10%
tTLH
FIGURE 1. CLOCK PREREQUISITE TIMES AND
PROPAGATION AND OUTPUT TRANSITION TIMES
MR
VS
VS
tW
tREM
VS
CP
tPHL
Q
VS
INPUT LEVEL
GND
INPUT LEVEL
GND
FIGURE 2. MASTER RESET PREREQUISITE TIMES AND
PROPAGATION DELAYS
VALID
DATA
CP
VS
tSU
tH
VS
INPUT LEVEL
GND
INPUT LEVEL
GND
FIGURE 3. DATA PREREQUISITE TIMES
S OR DS
CP
VALID
VS
tSU
tH
VS
INPUT LEVEL
GND
INPUT LEVEL
GND
FIGURE 4. PARALLEL LOAD OR SHIFT-LEFT/SHIFT-RIGHT
PREREQUISITE TIMES
7
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