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74HC194N Datasheet, PDF (5/19 Pages) Texas Instruments – High-Speed CMOS Logic 4-Bit Bidirectional Universal Shift Register
CD54HC194, CD74HC194, CD74HCT194
Prerequisite For Switching Function
PARAMETER
HC TYPES
Max. Clock Frequency
(Figure 1)
TEST
SYMBOL CONDITIONS VCC (V)
25oC
MIN MAX
-40oC TO 85oC -55oC TO 125oC
MIN MAX MIN MAX UNITS
fMAX
-
2
6
-
5
-
4
-
MHz
4.5
30
-
24
-
20
-
MHz
6
35
-
28
-
23
-
MHz
MR Pulse Width
(Figure 2)
tW
-
2
80
-
100
-
120
-
ns
4.5
16
-
20
-
24
-
ns
6
14
-
17
-
20
-
ns
Clock Pulse Width
(Figure 1)
tW
-
2
80
-
100
-
120
-
ns
4.5
16
-
20
-
24
-
ns
6
14
-
17
-
20
-
ns
Set-up Time
Data to Clock (Figure 3)
tSU
-
2
70
-
90
-
105
-
ns
4.5
14
-
18
-
21
-
ns
6
12
-
15
-
19
-
ns
Removal Time,
MR to Clock (Figure 2)
tREM
-
2
60
-
75
-
90
-
ns
4.5
12
-
15
-
18
-
ns
6
10
-
13
-
15
-
ns
Set-Up Time
tSU
S1, S0 to Clock (Figure 4)
-
2
80
-
100
-
120
-
ns
4.5
16
-
20
-
24
-
ns
6
14
-
17
-
20
-
ns
Set-up Time
tSU
DSL, DSR to Clock (Figure 4)
-
2
70
-
90
-
105
-
ns
4.5
14
-
18
-
21
-
ns
6
12
-
15
-
18
-
ns
Hold Time
tH
S1, S0 to Clock (Figure 4)
-
2
0
-
0
-
0
-
ns
4.5
0
-
0
-
0
-
ns
6
0
-
0
-
0
-
ns
Hold Time
Data to Clock (Figure 3)
tH
-
2
0
-
0
-
0
-
ns
4.5
0
-
0
-
0
-
ns
6
0
-
0
-
0
-
ns
HCT TYPES
Max. Clock Frequency (Figure 1)
MR Pulse Width (Figure 2)
Clock Pulse Width (Figure 1)
Set-up Time, Data to Clock
(Figure 3)
fMAX
tW
tW
tSU
-
4.5
27
-
22
-
18
-
MHz
-
4.5
16
-
20
-
24
-
ns
-
4.5
16
-
20
-
24
-
ns
-
4.5
14
-
18
-
21
-
ns
Removal Time MR to Clock
(Figure 2)
tREM
-
4.5
12
-
15
-
18
-
ns
5