ADC32J22_15 Datasheet, PDF (67/85 Pages) Texas Instruments – ADC32J2x Dual-Channel, 12-Bit, 50-MSPS to 160-MSPS, Analog-to-Digital Converter with JESD204B Interface

www.ti.com
9.6.2.19 Register 2Fh (address = 2Fh)
ADC32J22, ADC32J23, ADC32J24, ADC32J25
SBAS668A – MAY 2014 – REVISED JUNE 2015
Figure 183. Register 2Fh
7
6
5
4
SCRAMBLE EN
0
0
0
R/W-0h
W-0h
W-0h
W-0h
LEGEND: R/W = Read/Write; W = Write only; -n = value after reset
3
0
W-0h
2
0
W-0h
1
0
W-0h
Table 30. Register 2Fh Field Descriptions
Bit Field
7
SCRAMBLE EN
6-0 0
Type
R/W
W
Reset
0h
0h
Description
Scramble enable bit in the JESD204B interface.
0 = Scrambling disabled
1 = Scrambling enabled
Must write 0
0
0
W-0h
9.6.2.20 Register 30h (address = 30h)
Figure 184. Register 30h
7
6
5
4
3
2
1
0
OCTETS PER FRAME
R/W-0h
LEGEND: R/W = Read/Write; -n = value after reset
Bit Field
7-0 OCTETS PER FRAME
Table 31. Register 30h Field Descriptions
Type
R/W
Reset
0h
Description
These bits set the number of octets per frame (F).
01 = 20X serialization: two octets per frame
11 = 40X serialization: four octets per frame
9.6.2.21 Register 31h (address = 31h)
Figure 185. Register 31h
7
6
5
4
3
2
1
0
0
0
0
FRAMES PER MULTI FRAME
W-0h
W-0h
W-0h
R/W-0h
LEGEND: R/W = Read/Write; W = Write only; -n = value after reset
Table 32. Register 31h Field Descriptions
Bit Field
7-5 0
4-0 FRAMES PER MULTI FRAME
Type
W
Reset
0h
R/W
0h
Description
Must write 0
These bits set the number of frames per multiframe.
After reset, the default settings for frames per multiframe are:
20X mode: K = 8
For each mode, do not set K to a lower value.
Copyright © 2014–2015, Texas Instruments Incorporated
Submit Documentation Feedback
67
Product Folder Links: ADC32J22 ADC32J23 ADC32J24 ADC32J25