ADC32J22_15 Datasheet, PDF (45/85 Pages) Texas Instruments – ADC32J2x Dual-Channel, 12-Bit, 50-MSPS to 160-MSPS, Analog-to-Digital Converter with JESD204B Interface

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Timing Diagrams (continued)
Input
Clock
CLKINP
CLKINM
t_{SU_SYNC~}
t_{H_SYNC~}
SYNC~
ADC32J22, ADC32J23, ADC32J24, ADC32J25
SBAS668A – MAY 2014 – REVISED JUNE 2015
SYNC~ Deasserted Latency
t_D
ILA Sequence
(1)
DxP, DxM
K28.5
K28.5
K28.5
(1) x = A for channel A and B for channel B.
K28.5
K28.5
K28.5
K28.5
Figure 145. SYNC~ Latency in ILAS Phase
Sample N
K28.5
K28.0
Sample N
t_{SU_SYSREF}
t_{H_SYSREF}
t_{SU_SYNC~}
t_{H_SYNC~}
CLKIN
CLKIN
K28.0
SYSREF
Figure 146. SYSREF Timing (Subclass 1)
SYNC~
Figure 147. SYNC~ Timing (Subclass 2)
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