ADC32J22_15 Datasheet, PDF (58/85 Pages) Texas Instruments – ADC32J2x Dual-Channel, 12-Bit, 50-MSPS to 160-MSPS, Analog-to-Digital Converter with JESD204B Interface

ADC32J22, ADC32J23, ADC32J24, ADC32J25
SBAS668A – MAY 2014 – REVISED JUNE 2015
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9.6 Register Maps
REGISTER
ADDRESS
(A[13:0], Hex)
01
03
04
06
07
08
09
0A
0B
0C
0D
0E
0F
13
15
27
2A
2B
2F
30
31
34
3A
3B
3C
422
434
522
534
Table 9. Register Map Summary
REGISTER DATA
7
6
5
4
3
2
1
0
0
0
DIS DITHER CHA
DIS DITHER CHB
0
0
0
0
0
0
0
0
CHA GAINEN
0
0
0
0
0
0
0
CHB GAINEN
0
0
0
0
0
0
0
TEST PATTERN EN
RESET
0
0
0
SPECIAL MODE1 CHA
EN FOVR
0
0
0
0
SPECIAL MODE1 CHB
0
0
0
0
0
0
0
0
ALIGN TEST
PATTERN
DATA FORMAT
0
0
0
0
CHA TEST PATTERN
CHB TEST PATTERN
0
0
0
0
0
0
0
0
CHA DIGITAL GAIN
CHB DIGITAL GAIN
0
0
0
0
CUSTOM PATTERN [11:4]
CUSTOM PATTERN [3:0]
0
0
0
LOW SPEED MODE
0
0
0
0
0
0
0
0
CHA PDN
CHB PDN
0
STANDBY
GLOBAL PDN
0
CONFIG PDN PIN
CLK DIV
0
0
0
0
0
0
SERDES TEST PATTERN
IDLE SYNC
TRP LAYER
TESTMODE EN
FLIP ADC
DATA
LANE
ALIGN
FRAME ALIGN
TXMIT LINKDATA
DIS
0
0
0
0
0
0
CTRL K
CTRL F
SCRAMBLE EN
0
0
0
0
0
0
0
OCTETS PER FRAME
0
0
0
FRAMES PER MULTIFRAME
SUBCLASSV
0
0
0
0
0
SYNC REG
SYNC REQ EN
0
0
OUTPUT CURRENT SEL
LINK LAYER TESTMODE SEL [2:0]
LINK LAYER RPAT
0
PULSE DET MODES
FORCE LMFC
COUNT
LMFC COUNT INIT
RELEASE ILANE SEQ
0
0
0
0
0
0
SPECIAL
MODE2 CHA
0
0
0
DIS DITH CHA
0
DIS DITH CHA
0
0
0
0
0
0
0
0
0
SPECIAL
MODE2 CHB
0
0
0
DIS DITH CHB
0
DIS DITH CHB
0
0
0
58
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