TS3DDR32611_15 Datasheet, PDF (6/13 Pages) Texas Instruments – 1A Peak Sink/Source PCDDR3 Termination Regulator with Integrated Isolation Switch and Low Power Mode Operation

TS3DDR32611
SCDS347A – AUGUST 2013 – REVISED SEPTEMBER 2013
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TYPICAL CHARACTERISTICS
0.78
0.77
0.76
0.75
0.74
0.73
0.72
0.71
0.7
±1000
±500
0
500
VTT Current (mA)
Figure 1. VTT Load Regulation (0.75V)
1000
C001
0.71
0.7
0.69
0.68
0.67
0.66
0.65
0.64
0.63
±1000
±500
0
500
VTT Current (mA)
Figure 2. VTT Load Regulation (0.675V)
1000
C002
0.66
0.65
0.64
0.63
0.62
0.61
0.6
0.59
0.58
±1000
±500
0
500
VTT Current (mA)
Figure 3. VTT Load Regulation (0.625V)
1000
C003
0.760
0.758
0.756
0.754
0.752
0.750
0.748
0.746
0.744
0.742
0.740
±5
±3
±1
1
3
5
VREF Current (mA)
C004
Figure 4. VREF Load Regulation (0.75V)
0.685
0.683
0.681
0.679
0.677
0.675
0.673
0.671
0.669
0.667
0.665
±5
±3
±1
1
3
5
VREF Current (mA)
C005
Figure 5. VREF Load Regulation (0.675V)
0.635
0.630
0.625
0.620
0.615
±5
±3
±1
1
3
5
VREF Current (mA)
C006
Figure 6. VREF Load Regulation (0.625V)
6
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