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| TS3DDR32611_15 Datasheet, PDF (4/13 Pages) Texas Instruments – 1A Peak Sink/Source PCDDR3 Termination Regulator with Integrated Isolation Switch and Low Power Mode Operation | |||
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TS3DDR32611
SCDS347A â AUGUST 2013 â REVISED SEPTEMBER 2013
www.ti.com
ELECTRICAL CHARACTERISTICS
TA = â40°C to 85°C, Typical values are at VDD = 3.3V, TA = 25°C, (unless otherwise noted)
PARAMETER
TEST CONDITIONS
MIN
SUPPLY CURRENT
IVDD(HS)
VDD supply current in high
speed mode(1)
VDD = 3.3V
IVDD(LS)
VDD supply current in low
speed mode(1)
VDD = 3.3V
IVDD(PD)
VDD supply current in power
down mode(1)
VDD = 3.3V
IVLDOIN
VLDOIN supply current in high or
low speed mode
VDD = 3.3V
IVLDOIN(PD)
VLDOIN supply current in power
down mode
VDD = 3.3V
VTT OUTPUT
VTT
Output voltage
VTTTOL
Output voltage tolerance to
1/2VDDQ
VDDQ = 1.25V,
1.35V, 1.5V
IVTT(SRC)
IVTT(SINK)
IVTT(max)
Source current limit
Sink current limit
Max Source or Sink current
capability
VDDQ = 1.5 V
VDDQ = 1.5 V
VDDQ = 1.5 V
No load, VTT_EN=ODT_EN= 1.8V,
VDDQ=1.5 V
No load, VTT_EN=1.8V,
ODT_EN= 0V, VDDQ=1.5V
No load, VTT_EN=0V,ODT_EN= 0V,
VDDQ=1.5V
No load, VTT_EN=H, ODT_EN= H or
L, VDDQ=1.5V
No load, VTT_EN=L, ODT_EN=H or
L, VDDQ=1.5V
|IVTT|< 60 mA
|IVTT|< 550 mA
|IVTT|< 1 A
VTT=VTTSNS=0.6 V
VTT=VTTSNS=0.9 V
VTT=VTTSNS=0 V
-20
-35
-60
1000
1000
IVTT(DIS)
VTT Discharge current
IVTTSNS(BIAS) VTTSNS Input Bias current
VREF OUTPUT
VREF
Output voltage
VREFTOL
Output voltage tolerance to
1/2VDDQ
IVREF(SRC)
Source current limit
IVREF(SINK)
Sink current limit
VVREF(DIS)
VREF Discharge current
VDDQ INPUT
IVDDQ
VDDQ input current
ISOLATION SWITCH
VDDQ = 0 V
VTTSNS=VREF
VDDQ = 1.25V,
1.35V, 1.5V
VDDQ = 1.5V
VDDQ = 0V
VDDQ = 0V
VDDQ = 1.5V
VTT_EN=L, ODT_EN=H or L,
VTT = 0.5 V, TA=25°C
No load, VTT_EN=H, ODT_EN= H
â0.1
|IVREF|< 5 mA
VREF=0 V
VREF=1.5 V
VTT_EN=L,ODT_EN=H or L,
VREF=0.5 V, TA = 25°C
-1.0%*VDDQ
10
10
RON
RON, FLAT
ÎRON
ON-state resistance
ON-state resistance flatness
ON-state resistance match
between channels
VDD = 3.3V
VDD = 3.3V
VDD = 3.3V
VI/O = 0.75 V, |IVTT|= 18 mA
VI/O = 0 V to 0.75 V, |IVTT|= 18 mA
VI/O = 0.75 V, |IVTT|= 18 mA
DIGITAL CONTROL INPUTS (VTT_EN, ODT_EN)
VIH
Input logic high
VDD = 3.0 V to 3.6 V
1.3
VIL
Input logic low
VDD = 3.0 V to 3.6 V
VLHYST
Hysteresis voltage
ILK
Input leak current
â1
OVER-TEMPERATURE PROTECTION
TOTP
Over temperature protection
Shutdown temperature
Hysteresis
TYP
MAX
150
220
150
220
1
5
1
5
1
5
VDDQ/2
±15
20
±25
35
±35
60
1.5
10
0.1
VDDQ/2
1.0%*VDD
Q
2
30
40
1.75
4
0.2
0.4
0.2
0.6
0.5
1
150
30
UNIT
µA
µA
µA
µA
µA
V
mV
mA
mA
A
mA
µA
V
mV
mA
mA
mA
µA
Ω
Ω
Ω
V
V
V
µA
°C
(1) For ODT_EN and VTT_EN, If the VIH is less than 1.8V but more than Max VIH, or VIL is more than 0V but less than Max VIL, it will cause
the IVDD has the max 25µA increase based on the voltage at ODT_EN and VTT_EN.
4
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