TI380C60A Datasheet, PDF (6/16 Pages) Texas Instruments – CMOS TOKEN-RING INTERFACE DEVICE

TI380C60A
CMOS TOKEN-RING INTERFACE DEVICE
SPWS033 – DECEMBER 1996
receiver-clock recovery (continued)
RCV Data
PLL1
PLL2
RCLK
RCVR
f3dB ≅ _{680 kHz}
(see Note A)
f3dB ≅ _{162 kHz}
(see Note A)
NOTE A: f3dB = – 3dB bandwidth of PLL
Figure 3. Dual-PLL Arrangement
PLL1 represents the algorithm to recover data from the incoming stream detected by the receiver. It has a
relatively high bandwidth to provide good jitter tolerance. Data and embedded clock phase information are fed
as digital values to PLL2, which generates the extracted clock (RCLK) for the TI380C2x commprocessor. The
recovered data is sent to the TI380C2x as the RCVR signal is synchronous with RCLK. In addition to sampling
the RCVR signal, the TI380C2x uses RCLK to re-transmit data in most cases. The lower bandwidth of PLL2
greatly reduces the rate of accumulation of data-correlated phase jitter in a token-ring network and provides very
good accumulated-phase-slope (APS) characteristics. In addition to RCLK, the token-ring reference clock
(PXTAL) and a fixed-frequency 32-MHz clock (OSC32) are also synthesized from the 8-MHz crystal reference.
line driver, wrap function, and repeat mode
The line-drive function of the TI380C60A is performed by XMT+ and XMT–. Unlike the TMS38054, these pins
are low-impedance outputs and require external series resistance to provide line termination. These pins
provide buffering of the differential signal from the TI380C2x on DRVR+ / DRVR– with action to control skew and
asymmetry and with no re-timing in the transmit path.
The wrap function is designed to provide a signal path for system self-test diagnostics. When WRAP is taken
low, the receiver inputs are ignored and the transmit signal is fed to the receiver input circuitry by way of a
multiplexer. In the internal wrap mode, WRAP can be checked by observing the signal amplitude at the
equalization pins, EQ + and EQ –. Equalization is active at this signal level, although the signal does not exhibit
the high-frequency attenuation effects for which equalization is intended to compensate. During internal wrap
mode, both XMT+ and XMT– are driven to a low state to prevent any dc in the isolation transformer.
When the repeat function is selected, the sampled and re-timed ring data present on RCVR is also driven out
on XMT+ and XMT–. This allows the TI380C60A to operate as a stand-alone repeater. Both RCVR and RCLK
continue to provide valid sampled ring data and extracted clock as normal. The DRVR+/ DRVR– inputs are
ignored. The repeat function is enabled by taking REPT low while holding WRAP high.
phantom driver and wire-fault detection
The phantom-drive circuit under control of NSRT generates a dc voltage on both of the phantom-drive outputs,
PHOUTA and PHOUTB. In order to maintain the phantom drive, NSRT is toggled by the TI380C2x at least once
every 20 ms. An internal watchdog timer is included in the TI380C60A to remove the phantom drive if NSRT
fails to have the required transitions.
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