TI380C60A Datasheet, PDF (4/16 Pages) Texas Instruments – CMOS TOKEN-RING INTERFACE DEVICE

TI380C60A
CMOS TOKEN-RING INTERFACE DEVICE
SPWS033 – DECEMBER 1996
Pin Functions (Continued)
PIN
NAME
NO.
I / O / E† TYPE‡
DESCRIPTION
VSSA1
39
—
— Ground reference for receiver circuits
VSSA2
34
—
— Ground reference for data-recovery PLL
VSSD
4, 52
—
— Ground reference for output buffers
VSSL
9, 26
—
— Ground reference for internal logic
VSSX
17
—
— Ground reference for transmit output
VSSO
30
—
— Ground reference for XTAL oscillator
VSSP
22
—
— Ground reference for phantom drive
† _{I = input, O = output, E = provides external-component connection to the internal circuitry for tuning}
‡ _{TTL = TTL signal, N = non-TTL signal, D = differential drive or data}
architecture
The major blocks of the TI380C60A include the receiver / equalizer, clock recovery PLL, wrap function, phantom
drive with wire-fault detector, and watchdog timer. Figure 1 is the block diagram illustrating these major blocks,
and the functionality of each block is described in the following sections.
WRAP
External
Equalizer
REPT
EQ +
EQ –
XTAL
8 MHz
XT1 XT2
S4 / 16
ATEST
FRAQ
NABL
RCV+
RCV–
Receiver
OSC
CKT
RCV
Data
Receiver
Clock
Recovery
FRAQ
XMT+
XMT–
PHOUTA
PHOUTB
PWRDN
Transmit
Phantom
Drive
Bias Gen
Watchdog
Timer (22 ms)
Rate Error
Test Port
PXTAL
RCVR
RCLK
OSC32
REDY
DRVR+
DRVR–
WFLT
RATER
NSRT
IREF
TDI TDO TCLK TMS TRST
Figure 1. Functional Block Diagram
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