DRV10963 Datasheet, PDF (6/14 Pages) Texas Instruments – 5-V, THREE PHASE, SENSORLESS BLDC MOTOR DRIVER

DRV10963
SLAS955 – MARCH 2013
www.ti.com
FUNCTIONAL DESCRIPTION
The DRV10963 is a three phase sensor-less motor driver with integrated power MOSFETs. It is specifically
designed for high efficiency, low noise and low external component count motor drive applications. The
proprietary sensor-less window-less 180° sinusoidal control scheme satisfies the ultra-quiet motor operation
requirement.
Upon startup, the DRV10963 will spin the motor in the direction indicated by the FR input pin. The speed is
determined by the duty cycle of the PWM pin. Using this input, the DRV10963 will operate a three phase BLDC
motor using a sinusoidal control scheme. As the motor spins, the DRV10963 provides the speed information at
the FG pin.
The DRV10963 contains an intelligent lock detect function. Once the motor is stalled by external force, system
will be able to detect the lock condition within, T_{ON_LOCK}, and then release the output. It will attempt to restart the
motor after T_{OFF_LOCK}.
The DRV10963 also contains several internal protection circuits, such as over current protection, over voltage
protection, under voltage protection, and over temperature protection.
SPEED INPUT AND STANDBY MODE
The duty cycle of the PWM input is captured and converted into the corresponding duty cycle at the phase
outputs. The phase outputs are driven by an internally generated frequency of approximately 25 kHz. This
frequency is selected to reduce noise in the audible range and reduce the energy loss by the PWM switching.
In order to achieve reliable spin up and prevent a spike in the PWM signal, the transfer function is adjusted in the
DRV10963. The output duty cycle will be proportional to input duty cycle after the input reaches 10% duty cycle.
When the input is below a 10% duty cycle and above a 1.5% duty cycle, the output will be controlled at a 10%
duty cycle. When the input duty cycle is lower than 1.5%, the DRV10963 will not drive the output, but will be in
the active mode.
Figure 1. Duty Cycle Transfer Function
When the PWM input is driven low for at least TSTBY time, the DRV10963 will enter a low current standby
mode. In standby mode, the phase outputs will no longer be driven and circuitry within the device will be disabled
to minimize the system current in this state.
The device will remain in standby mode until either the PWM input is driven to a logic high (or a duty cycle of
greater than 0% is applied) or the PWM input is allow to float. If the input is allowed to float an internal pull-up
resistor will raise the voltage to a logic high level.
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