BQ24230 Datasheet, PDF (6/33 Pages) Texas Instruments – USB-FRIENDLY LITHIUM-ION BATTERY CHARGER AND POWER-PATH MANAGEMENT IC

bq24230
bq24232
SLUS821A – OCTOBER 2008 – REVISED DECEMBER 2008 .......................................................................................................................................... www.ti.com
RGT PACKAGE
(Top View)
TS
BAT
BAT
CE
16 15 14 13
1
12
2
11
bq24230
3
10
4
9
5 678
ILIM
OUT
OUT
CHG
16 15 14 13
TS 1
12 _ILIM
BAT 2
BAT 3
bq24232
11 OUT
10 OUT
CE 4
9 CHG
56 78
TERMINAL
NAME
NUMBER
'230 '232
TS
1
1
BAT
2,3 2, 3
CE
4
4
EN2
5
5
EN1
6
6
PGOOD
7
7
VSS
CHG
8
8
9
9
OUT
10,11 10, 11
ILIM
12
12
IN
13
13
TMR
14
14
TD
15
-
ITERM
-
15
ISET
16
16
Thermal
Pad
TERMINAL FUNCTIONS
I/O
DESCRIPTION
External NTC Thermistor Input. Connect the TS input to the NTC thermistor in the battery pack. TS monitors a 10-kΩ
I NTC thermistor. For applications that do not utilize the TS function, connect a 10-kΩ fixed resistor from TS to VSS to
maintain a valid voltage level on TS.
I/O
Charger Power Stage Output and Battery Voltage Sense Input. Connect BAT to the positive terminal of the battery.
Bypass BAT to VSS with a 4.7-µF to 47-µF ceramic capacitor.
Charge Enable Active-Low Input. Connect CE to a high logic level to place the battery charger in standby mode. In
I
standby mode, OUT is active and battery supplement mode is still available. Connect CE to a low logic level to enable
the battery charger. CE is internally pulled down with ~285 kΩ. Do not leave CE unconnected to ensure proper
operation.
I Input Current Limit Configuration Inputs. Use EN1 and EN2 control the maximum input current and enable USB
compliance. See Table 2 for the description of the operation states. EN1 and EN2 are internally pulled down with ~285
I _{kΩ. Do not leave EN1 or EN2 unconnected to ensure proper operation.}
Open-drain Power Good Status Indication Output. PGOOD pulls to VSS when a valid input source is detected. PGOOD
O is high-impedance when the input power is not within specified limits. Connect PGOOD to the desired logic voltage rail
using a 1-kΩ – 100-kΩ resistor, or use with an LED for visual indication.
– Ground. Connect to the thermal pad and to the ground rail of the circuit.
O
Open-Drain Charging Status Indication Output. CHG pulls to VSS when the battery is charging. CHG is high impedance
when charging is complete and when charger is disabled.
System Supply Output. OUT provides a regulated output when the input is below the OVP threshold and above the
O regulation voltage. When the input is out of the operation range, OUT is connected to V_BAT. Connect OUT to the system
load. Bypass OUT to VSS with a 4.7-µF to 47-µF ceramic capacitor.
I
Adjustable Current Limit Programming Input. Connect a 3.1-kΩ to 7.8-kΩ resistor from ILIM to VSS to program the
maximum input current (EN2=1, EN1=0). The input current includes the system load and the battery charge current.
Input Power Connection. Connect IN to the connected to external DC supply (AC adapter or USB port). The input
I operating range is 4.35 V to 6.6 V. The input can accept voltages up to 26 V without damage but operation is
suspended. Connect bypass capacitor 1 µF to 10 µF to VSS.
Timer Programming Input. TMR controls the precharge and fast-charge safety timers. Connect TMR to VSS to disable all
I safety timers. Connect a 18-kΩ to 72-kΩ resistor between TMR and VSS to program the timers a desired length. Leave
TMR unconnected to set the timers to the 5-hour fast charge and 30-minute precharge default timer values.
Termination Dsable Input. Connect TD high to disable charger termination. Connect TD to VSS to enable charger
I
termination. TD is checked during start-up only and cannot be changed during operation. See the TD section in this data
sheet for a description of the behavior when termination is disabled. TD is internally pulled down to VSS with ~285 kΩ.
Do not leave TD unconnected to ensure proper operation.
I
Termination Current Programming Input. Connect a 0-Ω to 15-kΩ resistor from ITERM to VSS to program the termination
current. Leave ITERM unconnected to set the termination current to the internal default 10% threshold.
Fast-Charge Current Programming Input. Connect a 3-kΩ to 36-kΩ resistor from ISET to VSS to program the fast-charge
I/O
current level. Charging is disabled if ISET is left unconnected. While charging, the voltage at ISET reflects the actual
charging current and can be used to monitor charge current. See the CHARGE CURRENT TRANSLATOR section for
more details.
An internal electrical connection exists between the exposed thermal pad and the VSS pin of the device. The thermal
– pad must be connected to the same potential as the VSS pin on the printed-circuit board. Do not use the thermal pad as
the primary ground input for the device. The VSS pin must be connected to ground at all times.
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