ADS1118_13 Datasheet, PDF (6/38 Pages) Texas Instruments – Ultra-Small, Low-Power, SPI™-Compatible, 16-Bit Analog-to-Digital Converter and Temperature Sensor with Internal Reference

ADS1118
SBAS457C – OCTOBER 2010 – REVISED FEBRUARY 2013
SPI TIMING CHARACTERISTICS
CS
SCLK
DIN
t_CSSC
t_DIST
t_SCLK
t_DIHD
Hi-Z
DOUT
t_CSDOD
t_SPWH
t_DOPD
t_SPWL
t_DOHD
Figure 1. Serial Interface Timing
t_CSH
t_SCCS
t_SCSC
t_CSDOZ
Hi-Z
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TIMING REQUIREMENTS: SERIAL INTERFACE TIMING
At T_A = –40°C to +125°C and VDD = 2.0 V to 5.5 V, unless otherwise noted.
SYMBOL
DESCRIPTION
t_CSSC
CS low to first SCLK: setup time⁽¹⁾
t_SCLK
SCLK period
t_SPWH
SCLK pulse width: high
t_SPWL
SCLK pulse width: low⁽²⁾
t_DIST
t_DIHD
t_DOPD
t_DOHD
t_CSDOD
t_CSDOZ
t_CSH
t_SCCS
Valid DIN to SCLK falling edge: setup time
Valid DIN to SCLK falling edge: hold time
SCLK rising edge to valid new DOUT: propagation delay⁽³⁾
SCLK rising edge to DOUT invalid: hold time
CS low to DOUT driven: propagation delay
CS high to DOUT Hi-Z: propagation delay
CS high pulse
Final SCLK falling edge to CS high
(1) CS can be tied low.
(2) Holding SCLK low longer than 28 ms resets the SPI interface.
(3) DOUT load = 20 pF || 100 kΩ to GND.
MIN
MAX UNIT
100
ns
250
ns
100
ns
100
ns
28 ms
50
ns
50
ns
50 ns
0
ns
100
ns
100
ns
200
ns
100
ns
6
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