MSC1210 Datasheet, PDF (59/83 Pages) OKI electronic componets – Clock For 1/2 Duty VFD

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Port 2 Data Direction High Register (P2DDRH)
SFR B2h
7
P27H
6
P27L
5
P26H
4
P26L
3
P25H
P2.7
bits 7−6
Port 2 Bit 7 Control.
P27H
0
0
1
1
P27L
0
1
0
1
Standard 8051 (Pull-Up)
CMOS Output
Open Drain Output
Input
P2.6
bits 5−4
Port 2 Bit 6 Control.
P26H
0
0
1
1
P26L
0
1
0
1
Standard 8051 (Pull-Up)
CMOS Output
Open Drain Output
Input
P2.5
bits 3−2
Port 2 Bit 5 Control.
P25H
0
0
1
1
P25L
0
1
0
1
Standard 8051 (Pull-Up)
CMOS Output
Open Drain Output
Input
P2.4
bits 1−0
Port 2 Bit 4 Control.
P24H
0
0
1
1
P24L
0
1
0
1
Standard 8051 (Pull-Up)
CMOS Output
Open Drain Output
Input
NOTE: Port 2 also controlled by EA and Memory Access Control HCR1.1.
MSC1210
SBAS203F − MARCH 2002 − REVISED NOVEMBER 2004
2
P25L
1
P24H
0
P24L
Reset Value
00h
59