TAS1020B Datasheet, PDF (58/114 Pages) Texas Instruments – USB Streaming Controller

SDA
SCL
Data Line Stable:
Data Valid
Change of Data
Allowed
Figure 2–11. Bit Transfer on the I²C Bus
The timing relationship between the SCL and SDA signals for the start and stop conditions is shown in Figure 2–12.
As shown, the start condition is defined as a high-to-low transition of the SDA signal while the SCL signal is high. Also
as shown, the stop condition is defined as a low-to-high transition of the SDA signal while the SCL signal is high.
SDA
SCL
S
P
Start Condition
Stop Condition
Figure 2–12. I²C START and STOP Conditions
When the TAS1020B is the device receiving data information, the TAS1020B acknowledges each byte received by
driving the SDA signal low during the acknowledge SCL period. During the acknowledge SCL period, the slave device
must stop driving the SDA signal. If the TAS1020B is unable to receive a byte, the SDA signal is not driven low and
is pulled high external to the TAS1020B device. Also, if the TAS1020B has received the last byte of data, it signals
an end of transmission to the slave device by issuing a not acknowledge, rather than an acknowledge, following
reception of the last byte. A high during the SCL period indicates a not-acknowledge to the slave device. The
acknowledge timing is shown in Figure 2–13.
Read and write data transfers by the TAS1020B device can be done using single byte or multiple byte data transfers.
Therefore, the actual transfer type used depends on the protocol required by the I²C slave device being accessed.
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