AM3505_15 Datasheet, PDF (57/223 Pages) Texas Instruments – AM3517, AM3505 Sitara™ Processors

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AM3517, AM3505
SPRS550F – OCTOBER 2009 – REVISED JULY 2014
4.4 Signal Description
Many signals are available on multiple pins according to the software configuration of the pin multiplexing
options.
1. SIGNAL NAME: The signal name
2. DESCRIPTION: Description of the signal
3. TYPE: Type = Ball type for this specific function:
– I = Input
– O = Output
– Z = High-impedance
– D = Open Drain
– DS = Differential
– A = Analog
4. BALL: Associated ball location
5. SUBSYSTEM PIN MULTIPLEXING: Contains a list of the pin multiplexing options at the
module/subsystem level. The pin function is selected at the module/system level.
Note: The Subsystem Multiplexing Signals are not described in Table 4-1 and Table 4-2.
4.4.1 External Memory Interfaces
SIGNAL NAME[1]
gpmc_a1
gpmc_a2
gpmc_a3
gpmc_a4
gpmc_a5
gpmc_a6
gpmc_a7
gpmc_a8
gpmc_a9
gpmc_a10
gpmc_a11
gpmc_a12
gpmc_a13
gpmc_a14
gpmc_a15
gpmc_a16
gpmc_a17
Table 4-4. External Memory Interfaces - GPMC Signals Description
DESCRIPTION[2] TYPE[3]
GPMC Address bit 1 O
GPMC Address bit 2 O
GPMC Address bit 3 O
GPMC Address bit 4 O
GPMC Address bit 5 O
GPMC Address bit 6 O
GPMC Address bit 7 O
GPMC Address bit 8 O
GPMC Address bit 9 O
GPMC Address bit 10 O
GPMC Address bit 11 O
multiplexed on
gpmc_d10
GPMC Address bit12 O
multiplexed on
gpmc_d11
GPMC Address bit13 O
multiplexed on
gpmc_d12
GPMC Address bit O
14multiplexed on
gpmc_d13
GPMC Address bit15 O
multiplexed on
gpmc_d14
GPMC Address bit16 O
multiplexed on
gpmc_d15
GPMC Address bit17 O
multiplexed on
gpmc_a1
ZCN BALL[4]
E3/G5
E2/G4
E1/G3
F7/G2
F6/G1
F4/H2
F3/H1
F2/J5
F1/J4
G6/J3
J2
J1
K4
K3
K2
K1
E3
ZER BALL[4]
W5/AA7
Y5/Y7
AB4/W7
AA5/AA9
AB5/Y8
AB6/AA8
AA6/AB8
W6/W8
AB7/W10
Y6/AB9
AB10
W9
AA10
Y9
V10
V9
W5
SUBSYSTEM PIN
MULTIPLEXING [5]
gpmc_a17
gpmc_a18
gpmc_a19
gpmc_a20
gpmc_a21
gpmc_a22
gpmc_a23
gpmc_a24
gpmc_a25
gpmc_a26
Copyright © 2009–2014, Texas Instruments Incorporated
Terminal Configuration and Functions
57
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