TMS320TCI6487 Datasheet, PDF (51/206 Pages) Texas Instruments – Communications Infrastructure Digital Signal Processor

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TMS320TCI6487
TMS320TCI6488
Communications Infrastructure Digital Signal Processor
SPRS358F – APRIL 2007 – REVISED AUGUST 2008
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
16
SRCC27 SRCC26 SRCC25 SRCC24 SRCC23 SRCC22 SRCC21 SRCC20 SRCC19 SRCC18 SRCC17 SRCC16 SRCC15 SRCC14 SRCC13 SRCC12
R/W-0 R/W-0 R/W-0 R/W-0 R/W-0 R/W-0 R/W-0 R/W-0 R/W-0 R/W-0 R/W-0 R/W-0 R/W-0 R/W-0 R/W-0 R/W-0
15
14
13
12
11
10
9
8
7
6
5
4
3
0
SRCC11 SRCC10 SRCC9 SRCC8 SRCC7 SRCC6 SRCC5 SRCC4 SRCC3 SRCC2 SRCC1 SRCC0
Reserved
R/W-0 R/W-0
R/W-0 R/W-0 R/W-0 R/W-0 R/W-0 R/W-0
LEGEND: R/W = Read/Write; R = Read only; -n = value after reset
R/W-0
R/W-0
R/W-0
R/W-0
Figure 3-3. IPC Acknowledgment Registers (IPCAR0-IPCAR2)
R-0000
Table 3-6. IPC Acknowledgment Registers (IPCAR0-IPCAR2) Field Descriptions
Bit Field
31:4 SRCC[27:0]
3:0 Reserved
Value
0
1
Description
Write:
No effect
Clear register bit
Read:
Returns current value of internal register bit
Reserved
3.6 JTAG ID (JTAGID) Register Description
The JTAG ID register is a read-only register that identifies to the customer the JTAG/Device ID. For the
TCI6487/8 device, the JTAG ID register resides at address location 0x0288 0814. Table 3-7 provides the
JTAG register names and descriptions.
REGISTER NAME
Variant
PartID
Manufacturing ID
LSB
Table 3-7. JTAG ID (JTAGID) Register Field Descriptions
WIDTH
4
16
11
1
BITS
31:28
27:12
11:1
0
VALUE
Silicon Revision 1.1 =
0001b
Silicon Revision 1.0 =
0000b
0000 0000 1001 0010
000 0001 0111b
1b
DESCRIPTION
Used to indicate new PGs
Part number for boundary scan.
Indicates Manufacturer
3.7 Debugging Considerations
It is recommended that external connections be provided to device configuration pins. Although internal
pullup/pulldown resistors exist on these pins, providing external connectivity adds convenience to the user
in debugging and flexibility in switching operating modes.
For the internal pullup/pulldown resistors for all device pins, see Table 2-5.
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Device Configuration
51