TMS320TCI6487 Datasheet, PDF (193/206 Pages) Texas Instruments – Communications Infrastructure Digital Signal Processor

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TMS320TCI6487
TMS320TCI6488
Communications Infrastructure Digital Signal Processor
SPRS358F – APRIL 2007 – REVISED AUGUST 2008
Table 8-78. Antenna Interface System Registers (continued)
HEX ADDRESS
02BF 0824
02BF 0828
02BF 082C
02BF 0830
02BF 0834
02BF 0838 - 02BF 0FFC
02BF 1000
02BF 1004
02BF 1008
02BF 100C
02BF 1010
02BF 1014
02BF 1018
02BF 101C
02BF 1020
02BF 1024
02BF 1028
02BF 102C
02BF 1030
02BF 1034
02BF 1038 - 02BF 17FC
02BF 1800
02BF 1804
02BF 1808
02BF 180C
02BF 1810
02BF 1814
02BF 1818
02BF 181C
02BF 1820
ACRONYM
EE_LINK1_MSK_SET_B_EV1
EE_LINK1_MSK_CLR_A_EV0
EE_LINK1_MSK_CLR_B_EV0
EE_LINK1_MSK_CLR_A_EV1
EE_LINK1_MSK_CLR_B_EV1
-
EE_LINK2_IRS_A
EE_LINK2_IRS_B
EE_LINK2_IMS_A_EV0
EE_LINK2_IMS_B_EV0
EE_LINK2_IMS_A_EV1
EE_LINK2_IMS_B_EV1
EE_LINK2_MSK_SET_A_EV0
EE_LINK2_MSK_SET_B_EV0
EE_LINK2_MSK_SET_A_EV1
EE_LINK2_MSK_SET_B_EV1
EE_LINK2_MSK_CLR_A_EV0
EE_LINK2_MSK_CLR_B_EV0
EE_LINK2_MSK_CLR_A_EV1
EE_LINK2_MSK_CLR_B_EV1
-
EE_LINK3_IRS_A
EE_LINK3_IRS_B
EE_LINK3_IMS_A_EV0
EE_LINK3_IMS_B_EV0
EE_LINK3_IMS_A_EV1
EE_LINK3_IMS_B_EV1
EE_LINK3_MSK_SET_A_EV0
EE_LINK3_MSK_SET_B_EV0
EE_LINK3_MSK_SET_A_EV1
REGISTER NAME
EE Link 1 AI_EVENT[1] Interrupt Source Mask Set
RegisterB
EE Link 1 AI_EVENT[0] Interrupt Source Mask Clear
Register A
EE Link 1 AI_EVENT[0] Interrupt Source Mask Clear
Register B
EE Link 1 AI_EVENT[1] Interrupt Source Mask Clear
Register A
EE Link 1 AI_EVENT[1] Interrupt Source Mask Clear
Register B
Reserved
EE Link 2 Interrupt Source Raw Status Register A
EE Link 2 Interrupt Source Raw Status Register B
EE Link 2 AI_EVENT[0] Interrupt Source Masked Status
Register A
EE Link 2 AI_EVENT[0] Interrupt Source Masked Status
Register B
EE Link 2 AI_EVENT[1] Interrupt Source Masked Status
Register A
EE Link 2 AI_EVENT[1] Interrupt Source Masked Status
Register B
EE Link 2 AI_EVENT[0] Interrupt Source Mask Set
Register A
EE Link 2 AI_EVENT[0] Interrupt Source Mask Set
Register B
EE Link 2 AI_EVENT[1] Interrupt Source Mask Set
Register A
EE Link 2 AI_EVENT[1] Interrupt Source Mask Set
Register B
EE Link 2 AI_EVENT[0] Interrupt Source Mask Clear
Register A
EE Link 2 AI_EVENT[0] Interrupt Source Mask Clear
Register B
EE Link 2 AI_EVENT[1] Interrupt Source Mask Clear
Register A
EE Link 2 AI_EVENT[1] Interrupt Source Mask Clear
Register B
Reserved
EE Link 3 Interrupt Source Raw Status Register A
EE Link 3 Interrupt Source Raw Status Register B
EE Link 3 AI_EVENT[0] Interrupt Source Masked Status
Register A
EE Link 3 AI_EVENT[0] Interrupt Source Masked Status
Register B
EE Link 3 AI_EVENT[1] Interrupt Source Masked Status
Register A
EE Link 3 AI_EVENT[1] Interrupt Source Masked Status
Register B
EE Link 3 AI_EVENT[0] Interrupt Source Mask Set
Register A
EE Link 3 AI_EVENT[0] Interrupt Source Mask Set
Register B
EE Link 3 AI_EVENT[1] Interrupt Source Mask Set
Register A
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Peripheral Information and Electrical Specifications 193