TIR2000 Datasheet, PDF (51/63 Pages) Texas Instruments – High-Speed Serial Infrared Controller With 64-Byte FIFO

4.14.2 General Purpose I/O Data Register (GPIODAT) – (read and write)
Address = C, Bank 3
Bit No.
7
6
5
4
3
2
1
Definition
GPIO8
data
GPIP7
data
GPIO6
data
GPIO5
data
GPIO4
data
GPIO3
data
GPIO2
data
Default
0
0
0
0
0
0
0
0
GPIO1
data
0
When a GPIO terminal is in the input mode, the value at the GPIO terminals are latched into the GPIODAT
registers, which the CPU can read. But when a GPIO terminal is in the output mode, internal data is available
at the GPIO terminal. The value at the output terminal depends on the GPIODAT register value, the test pin
of the device and the GPFSR value.
4.14.3 General Purpose Function Select Register (GPFSR) – (write only)
Address D , Bank 3
Bit No.
7
6
5
4
3
2
1
0
Definition
GPFSR [7–0]
Default
0
0
0
0
0
0
0
0
When the TEST pin is a 0, the value at the GPIO terminal depends on the GPFSR value. When the GPFSR
bit is a 0, the corresponding GPIODAT register bit is available in the GPIO terminal. When, the GPFSR bit
is a 1, some internal signals are available at the GPIO terminals. Refer to the following:
TEST GPFSR GPIO7
PIN [7–0]
GPIO6
GPIO5
GPIO4
GPIO3
GPIO2
GPIO1
GPIO0
1X
FIR/MIR FIR/MIR RX
RX clock TX clock state[1]
RX
state[0]
TX
state[3]
TX
state[2]
TX
state[1]
TX
state[0]
0 1111_
0
0
0
0
0
DDIS
Presc.clk Baudout
1111
out
Z
0 0000_
0000
GPIODAT GPIODAT GPIODAT GPIODAT GPIODAT GPIODAT GPIODAT GPIODA
[7]
[6]
[5]
[4]
[3]
[2]
[1]
T[0]
4.14.4 Ir Mode Configuration Register 1 (IRCFG) – (read and write)
Address A, Bank 3
IR Configuration Register (IRCFG)
Bit No.
[7–4]
3
Definition
Not used
SIR pulse duration
0: 3/16 of bit rate
1: 1.6-us
Default
0
2
Not used
1
Select IRRVL/IRRVH in TV mode
and SHARP mode
0
0
TEMIC bit
0
Bit definition:
BIT NO.
DESCRIPTIONS
0
Temic IBM bit. Bit 0 is used for automatic mode selection (High speed/Low speed) in Temic IBM
transceivers
1
Select IIRVL/IRRVH. Bit 1 selects the IIRVL and IRRVH in the TV and SHARP modes.
2
Not used
3
SIR pulse duration select. Bit 3 will determine the selection of either a 1.6 µs or a 3/16 of baud-rate pulse
width.
4–15