DAC8812 Datasheet, PDF (5/18 Pages) Texas Instruments – Dual, Serial Input 16-Bit Multiplying Digital-to-Analog Converter

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PIN
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
NAME
R_FBA
V_REFA
I_OUTA
A_GNDA
A_GNDB
I_OUTB
V_REFB
R_FBB
SDI
RS
CS
DGND
V_DD
MSB
LDAC
CLK
DAC8812
SBAS349A – AUGUST 2005 – REVISED DECEMBER 2005
PIN CONFIGURATION
DAC8812
(TOP VIEW)
R_FBA
1
V_REFA
2
I_OUTA
3
A_GNDA
4
A_GNDB
5
I_OUTB
6
V_REFB
7
R_FBB
8
16
CLK
15
LDAC
14
MSB
13
V_DD
12
DGND
11
CS
10
RS
9
SDI
PIN DESCRIPTION
DESCRIPTION
Establish voltage output for DAC A by connecting to external amplifier output.
DAC A Reference voltage input terminal. Establishes DAC A full-scale output voltage. Can
be tied to V_DD pin.
DAC A Current output.
DAC A Analog ground.
DAC B Analog ground.
DAC B Current output.
DAC B Reference voltage input terminal. Establishes DAC B full-scale output voltage. Can
be tied to V_DD pin.
Establish voltage output for DAC B by connecting to external amplifier output.
Serial data input; data loads directly into the shift register.
Reset pin; active low input. Input registers and DAC registers are set to all 0s or midscale.
Register data = 0x0000 when MSB = 0. Register data = 0x8000 when MSB = 1 for
DAC8812.
Chip-select; active low input. Disables shift register loading when high. Transfers serial
register data to input register when CS goes high. Does not affect LDAC operation.
Digital ground.
Positive power-supply input. Specified range of operation 2.7 V to 5.5 V.
MSB bit sets output to either 0 or midscale during a RESET pulse (RS) or at system
power-on. Output equals zero scale when MSB = 0 and midscale when MSB = 1. MSB pin
can be permanently tied to ground or V_DD.
Load DAC register strobe; level sensitive active low. Transfers all input register data to the
DAC registers. Asynchronous active low input. See Table 2 for operation.
Clock input. Positive edge clocks data into shift register.
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