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CD74HC373 Datasheet, PDF (5/9 Pages) Texas Instruments – High Speed CMOS Logic Octal Transparent Latch, Three-State Output
CD74HC373, CD74HCT373, CD54HC573, CD74HC573, CD74HCT573
Prerequisite For Switching Specifications
PARAMETER
TEST
VCC
25oC
-40oC TO 85oC -55oC TO 125oC
SYMBOL CONDITIONS (V) MIN TYP MAX MIN MAX MIN MAX UNITS
HC TYPES
LE Pulse Width
tW
-
2 80 -
-
100
-
120
-
ns
4.5 16 -
-
20
-
24
-
ns
6 14 -
-
17
-
20
-
ns
Set-up Time Data to LE
tSU
-
2 50 -
-
65
-
75
-
ns
4.5 10 -
-
13
-
15
-
ns
Hold Time, Data to LE
(573)
Hold Time, Data to LE
(373)
6
9
-
-
11
-
13
-
ns
tH
-
2 40 -
-
50
-
60
-
ns
4.5 8 -
-
10
-
12
-
ns
6
7
-
-
9
-
10
-
ns
tH
-
2
5
-
-
5
-
5
-
ns
4.5 5 -
-
5
-
5
-
ns
6
5
-
-
5
-
5
-
ns
HCT TYPES
LE Pulse Width
Set-up Time Data to LE
Hold Time, Data to LE
tw
-
4.5 16 -
-
20
-
24
-
ns
tw
-
4.5 13 -
-
16
-
20
-
ns
tH
-
4.5 10 -
-
13
-
15
-
ns
Switching Specifications Input tr, tf = 6ns
PARAMETER
HC TYPES
Propagation Delay,
Data to Qn
(HC/HCT373)
TEST
SYMBOL CONDITIONS VCC (V)
tPLH, tPHL CL = 50pF
2
4.5
6
25oC
-40oC TO 85oC
TYP MAX
MAX
-
150
190
-
30
38
-
26
33
-55oC TO
125oC
MAX
225
45
38
UNITS
ns
ns
ns
Propagation Delay,
Data to Qn
(HC/HCT573)
CL = 15pF
5
12
-
-
tPLH, tPHL CL = 50pF
2
-
175
220
4.5
-
35
44
6
-
30
37
-
ns
265
ns
53
ns
45
ns
Propagation Delay,
LE to Qn
CL = 15pF
5
14
-
-
tPLH, tPHL CL = 50pF
2
-
175
220
4.5
-
35
44
-
ns
265
ns
53
ns
6
-
30
37
45
ns
CL = 15pF
5
14
-
-
-
ns
5