BQ25040 Datasheet, PDF (5/25 Pages) Texas Instruments – 1.1A, Single-Input, Single Cell Li-Ion Battery Charger With 50mA LDO and 2.3A Production Test Support

bq25040
www.ti.com ...................................................................................................................................................... SLUS910B – MARCH 2009 – REVISED MARCH 2009
PIN CONFIGURATION
10-Pin 2mm × 3mm DFN
(TOP VIEW)
IN ₁
ISET 2
VSS ₃
LDO 4
IFULL ⁵
bq25040
10 _BAT
9 PG
8 CHG
7 VSS
6 EN/SET
PIN
NAME
NO.
IN
1
ISET
2
VSS
3, 7
LDO
4
IFULL
5
EN/SET
6
CHG
8
PG
9
BAT
10
Thermal PAD Pad
PIN FUNCTIONS
I/O
DESCRIPTION
I
Input power supply. IN is connected to the external dc supply (ac adapter or USB port). Bypass IN to VSS
with at least a 1µF ceramic capacitor.
Current programming input. Connect a resistor from ISET to VSS to program the fast-charge current
I
when the user programmable mode is selected by EN/SET. If the current limit set by ISET is lower than
the USB500 limit, the current is limited by the ISET setting even in USB500 mode. The resistor range is
between 475Ω and 5.36kΩ to set the current between 100 mA and 1.1 A.
– Ground terminal. Connect to the thermal pad and the ground plane of the circuit.
LDO output. LDO is regulated to 4.9V and drives up to 50mA. Bypass LDO to VSS with at least a 1µF
O ceramic capacitor. LDO is enabled when VIN is above the UVLO and less than V_OVP. The LDO current is
not limited by the input current limit.
Charge done current programming input. Connect a resistor from IFULL to VSS to program the charge
I done threshold. The CHG output goes high-impedance when I_BAT falls to the charge done threshold. The
charge done threshold is programmable from 5% to 50% of the fast charge current programmed at ISET.
I
One-wire Interface Input. Drive EN/SET with pulses to enable/disable the device and select different
modes. See Table 1 for the data map. EN/SET is pulled to VSS with an internal ~260kΩ resistor.
Charge done indicator open-drain output. CHG is pulled low while the device is charging the battery. CHG
O goes high impedance when the battery is fully charged and does not indicate subsequent recharge
cycles. CHG is high impedance during fault conditions.
Power good open-drain output. PG is an open-drain output that pulls to VSS when the input power is
O above the battery voltage by 80mV and below the OVP threshold. PG is high impedance when outside
this range.
Battery connection output. Connect the battery and the system input to BAT. Bypass BAT to VSS with at
O least a 1µF ceramic capacitor. If no battery is installed, the capacitance on the BAT line must be at least
40µF. In Production Test Mode, BAT regulates to 4.2V and supplies up to 2.3A.
There is an internal electrical connection between the exposed thermal pad and the VSS pin of the
-
device. The thermal pad must be connected to the same potential as the VSS pin on the printed circuit
board. Do not use the thermal pad as the primary ground input for the device. VSS pin must be
connected to ground at all times.
Copyright © 2009, Texas Instruments Incorporated
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