BQ24100 Datasheet, PDF (5/26 Pages) Texas Instruments – SYNCHRONOUS SWITCHMODE, LI-ION AND LI-POL CHARGE MANAGEMENT IC WITH INTEGRATED POWERFETS

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bq24100, bq24103
bq24105, bq24108
bq24113, bq24115
SLUS606C – JUNE 2004 – REVISED SEPTEMBER 2005
ELECTRICAL CHARACTERISTICS (continued)
T_J = 0°C to 125°C and recommended supply voltage range (unless otherwise stated)
PARAMETER
TEST CONDITIONS
MIN
t_dg-TS
Deglitch time for temperature fault, TS
V_O(VTSB) TS bias output voltage
V_O(VTSB) TS bias voltage regulation accuracy
BATTERY RECHARGE THRESHOLD
Both rising and falling,
2-mV overdrive t_RISE, t_FALL = 100 ns
V_CC > V_IN(min),
I_(VTSB) = 10 mA 0.1 µF ≤ C_O(VTSB) ≤ 1 µF
V_CC > _IN(min),
I_(VTSB) = 10 mA 0.1 µF ≤ C_O(VTSB) ≤ 1 µF
20
–10%
V_RCH
Recharge threshold voltage
Below V_OREG
75
t_dg-RCH
Deglitch time
V_I(BAT) < decreasing below threshold,
t_FALL = 100 ns 10-mV overdrive
20
STAT1, STAT2, AND PG OUTPUTS
V_OL(STATx) Low-level output saturation voltage, STATx
V_OL(PG)
Low-level output saturation voltage, PG
CE CMODE, CELLS INPUTS
I_O = 5 mA
I_O = 10 mA
V_IL
Low-level input voltage
I_IL = 5 µA
0
V_IH
High-level input voltage
I_IH = 20 µA
1.3
TTC INPUT
t_PRECHG
t_CHARGE
Precharge timer
Programmable charge timer range
Charge timer accuracy
K_TTC
Timer multiplier
C_TTC
Charge time capacitor range
V_{TTC_EN} TTC enable threshold voltage
SLEEP COMPARATOR
t_(CHG) = C_{(TTC) ×} K_(TTC)
0.01 µF ≤ C_(TTC) ≤ 0.18 µF
V_(TTC) rising
1440
25
-10%
0.01
V_SLP-ENT Sleep-mode entry threshold
2.3 V ≤ V_I(OUT) ≤ V_OREG, for 1 or 2 cells
V_I(OUT) = 12.6 V, R_IN = 1 kΩ
bq24105/15 ⁽¹⁾
V_CC ≤ V_IBAT
+5 mV
V_CC ≤ V_IBAT
-4 mV
V_SLP-EXIT Sleep-mode exit hysteresis,
2.3 V ≤ V_I(OUT)≤ V_OREG
40
V_CC decreasing below threshold,
t_FALL = 100 ns, 10-mV overdrive,
PMOS turns off
t_dg-SLP
Deglitch time for sleep mode
V_CC decreasing below threshold,
t_FALL = 100 ns, 10-mV overdrive,
20
STATx pins turn off
UVLO
V_UVLO-ON
PWM
IC active threshold voltage
IC active hysteresis
V_CC rising
V_CC falling
3.15
120
Internal P-channel MOSFET on-resistance ^{7 V ≤ VCC ≤ VCC(max)}
4.5 V ≤ V_CC ≤ 7 V
7 V ≤ V_CC ≤ V_CC(max)
Internal N-channel MOSFET on-resistance
4.5 V ≤ V_CC ≤ 7 V
f_OSC
Oscillator frequency
Frequency accuracy
–9%
D_MAX
Maximum duty cycle
D_MIN
Minimum duty cycle
0%
t_TOD
Switching delay time (turn on)
t_syncmin
Minimum synchronous FET on time
Synchronous FET minimum current-off
threshold ⁽²⁾
50
TYP
MAX UNIT
30
40
ms
3.15
V
10%
100
125 mV/cell
30
40
ms
0.5
V
0.1
0.4
V
V_CC
1800
2.6
200
2160
572
10%
0.22
s
minutes
min/nF
µF
mV
V_CC ≤ V_IBAT
+75 mV
V
V_CC ≤ V_IBAT
+73 mV
160
mV
5
µs
30
40
ms
3.30
3.50
V
150
mV
400
500
mΩ
130
150
1.1
MHz
9%
100%
20
ns
60
ns
400
mA
(1) For bq24105 and bq24115 only. R_IN is connected between IN and PGND pins and needed to ensure sleep entry.
(2) N-channel always turns on for ~60 ns and then turns off if current is too low.
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