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AMC1100_15 Datasheet, PDF (5/33 Pages) Texas Instruments – AMC1100 Fully-Differential Isolation Amplifier
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AMC1100
SBAS562A – APRIL 2012 – REVISED DECEMBER 2014
6.7 IEC Safety Limiting Values
Safety limiting intends to prevent potential damage to the isolation barrier upon failure of input or output (I/O) circuitry. I/O
circuitry failure can allow low resistance to either ground or supply and, without current limiting, dissipate sufficient power to
overheat the die and damage the isolation barrier, thus potentially leading to secondary system failures.
The safety-limiting constraint is the operating virtual junction temperature range specified in the Absolute Maximum Ratings
table. The power dissipation and junction-to-air thermal impedance of the device installed in the application hardware
determine the junction temperature. The assumed junction-to-air thermal resistance in the Thermal Information table is that of
a device installed in the JESD51-3, Low Effective Thermal Conductivity Test Board for Leaded Surface-Mount Packages and
is conservative. The power is the recommended maximum input voltage times the current. The junction temperature is then
the ambient temperature plus the power times the junction-to-air thermal resistance.
PARAMETER
TEST CONDITIONS
MIN TYP MAX UNIT
IS Safety input, output, or supply current
TC Maximum-case temperature
θJA = 246°C/W, VIN = 5.5 V, TJ = +150°C, TA = +25°C
10 mA
+150 °C
6.8 IEC 61000-4-5 Ratings
PARAMETER
VIOSM Surge immunity
TEST CONDITIONS
1.2-μs or 50-μs voltage surge and 8-μs or 20-μs current surge
VALUE
±6000
UNIT
V
6.9 IEC 60664-1 Ratings
PARAMETER
Basic isolation group
Installation classification
TEST CONDITIONS
Material group
Rated mains voltage ≤ 150 VRMS
Rated mains voltage ≤ 300 VRMS
Rated mains voltage ≤ 400 VRMS
Rated mains voltage < 600 VRMS
SPECIFICATION
II
I-IV
I-IV
I-III
I-III
6.10 Package Characteristics(1)
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX UNIT
L(I01) Minimum air gap (clearance)
Shortest terminal-to-terminal distance
through air
7
mm
L(I02) Minimum external tracking (creepage)
Shortest terminal-to-terminal distance
across package surface
7
mm
CTI
Tracking resistance
(comparative tracking index)
DIN IEC 60112 and VDE 0303 part 1
> 400
V
Minimum internal gap
(internal clearance)
Distance through insulation
0.014
mm
RIO Isolation resistance
CIO Barrier capacitance input to output
CI
Input capacitance to ground
Input to output, VIO = 500 V, all pins on
each side of the barrier tied together to
create a two-terminal device, TA < +85°C
Input to output, VIO = 500 V,
+85°C ≤ TA < TA max
VI = 0.5 VPP at 1 MHz
VI = 0.5 VPP at 1 MHz
> 1012
Ω
> 1011
Ω
1.2
pF
3
pF
(1) Creepage and clearance requirements should be applied according to the specific equipment isolation standards of a specific
application. Care should be taken to maintain the creepage and clearance distance of the board design to ensure that the mounting
pads of the isolator on the printed circuit board (PCB) do not reduce this distance. Creepage and clearance on a PCB become equal
according to the measurement techniques shown in the Isolation Glossary section. Techniques such as inserting grooves or ribs on the
PCB are used to help increase these specifications.
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