ADS6149_1 Datasheet, PDF (5/69 Pages) Texas Instruments – 14/12-Bit, 250/210 MSPS ADCs With DDR LVDS and Parallel CMOS Outputs

ADS6149/ADS6129
ADS6148/ADS6128
www.ti.com ..................................................................................................................................................... SLWS211B – JULY 2008 – REVISED OCTOBER 2008
RECOMMENDED OPERATING CONDITIONS
over operating free-air temperature range (unless otherwise noted)
SUPPLIES
AVDD Analog supply voltage
DRVDD Digital supply voltage
ANALOG INPUTS
Differential input voltage range
Input common-mode voltage
Voltage applied on CM in external reference mode
Maximum analog input frequency with 2 V_PP input amplitude⁽¹⁾
Maximum analog input frequency with 1 V_PP input amplitude⁽¹⁾
CLOCK INPUT
Input clock sample rate
ADS6149 / ADS6129
ADS6148 / ADS6128
Sine wave, ac-coupled
Input Clock amplitude differential
(V_CLKP–V_CLKM)
LVPECL, ac-coupled
LVDS, ac-coupled
LVCMOS, single-ended, ac-coupled
Input clock duty cycle
DIGITAL OUTPUTS
C_L
Maximum external load capacitance from each output pin to DRGND
R_L
Differential load resistance between the LVDS output pairs (LVDS mode)
T_A
Operating free-air temperature
(1) See the Theory of Operation in the application section.
MIN
TYP MAX UNIT
3
3.3 3.6
V
1.7
1.8 1.9
V
2
1.5 ±0.1
1.5 ± 0.05
500
800
V_pp
V
V
MHz
MHz
1
1
0.3
40%
1.5
1.6
0.7
3.3
50%
250
MSPS
210
V_pp
V
60%
5
pF
100
Ω
–40
85 °C
Copyright © 2008, Texas Instruments Incorporated
Submit Documentation Feedback
5
Product Folder Link(s): ADS6149/ADS6129 ADS6148/ADS6128