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TMS320DM6437_08 Datasheet, PDF (49/305 Pages) Texas Instruments – Digital Media Processor
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TMS320DM6437
Digital Media Processor
SPRS345D – NOVEMBER 2006 – REVISED JUNE 2008
SIGNAL
NAME
ZWT
NO.
HD0/VLYNQ_SCRUN/
AD18/GP[58]
C8
HD1/VLYNQ_RXD0/
AD16/GP[59]
D7
HD2/VLYNQ_RXD1/
AD17/GP[60]
A8
HD3/VLYNQ_RXD2/
PCBE2/GP[61]
B7
HD4/VLYNQ_RXD3/
PFRAME/GP[62]
C7
HD5/VLYNQ_TXD0/
PIRDY/GP[63]
A6
HD6/VLYNQ_TXD1/
PTRDY/GP[64]
D6
HD7/VLYNQ_TXD2/
PDEVSEL/GP[65]
B6
HD8/VLYNQ_TXD3/
PPERR/GP[66]
A5
HD9/MCOL/
PSTOP/GP[67]
C6
HD10/MCRS/
PSERR/GP[68]
B5
HD11/MTXD3/
PCBE1/GP[69]
C5
HD12/MTXD2/
PPAR/GP[70]
D5
HD13/MTXD1/
AD14/GP[71]
B4
HD14/MTXD0/
AD15/GP[72]
D4
HD15/MTXCLK/
AD12/GP[73]
A4
HHWIL/MRXDV/
AD13/GP[74]
C4
HCNTL1/MTXEN/
AD11/GP[75]
D3
HCNTL0/MRXER/
AD10/GP[76]
B3
HR/W/MRXCLK/
AD8/GP[77]
A3
HDS2/MRXD0/
AD9/GP[78]
C3
Table 2-18. Host-Port Interface Terminal Functions
ZDU
NO.
B9
C9
TYPE (1)
OTHER (2) (3)
Host-Port Interface (HPI)
IPU
DVDD33
DESCRIPTION
A9
B8
C8
A7
C7
B7
I/O/Z
A6
C6
IPD
DVDD33
This pin is multiplexed between HPI, VLYNQ or EMAC, PCI,
and GPIO.
In HPI mode, these pins are host-port data pins HD[15:0]
(I/O/Z) and are multiplexed internally with the HPI address
lines.
B6
A5
C5
B4
B5
A4
D3
I/O/Z
C4
I/O/Z
B2
I/O/Z
A3
I/O/Z
C2
I/O/Z
IPD
DVDD33
IPD
DVDD33
IPD
DVDD33
IPD
DVDD33
IPU
DVDD33
This pin is multiplexed between HPI, EMAC, PCI, and GPIO.
In HPI mode, this pin is half-word identification input HHWIL
(I).
This pin is multiplexed between HPI, EMAC, PCI, and GPIO.
In HPI mode, this pin is control input 1 HCNTL1 (I). The state
of HCNTL1 and HCNTL0 determines if address, data, or
control information is being transmitted between an external
host and the DM6437.
This pin is multiplexed between HPI, EMAC, PCI, and GPIO.
In HPI mode, this pin is control input 0 HCNTL0 (I). The state
of HCNTL1 and HCNTL0 determines if address, data, or
control information is being transmitted between an external
host and the DM6437.
This pin is multiplexed between HPI, EMAC, PCI, and GPIO.
In HPI mode, this pin is host read or write select input
HR/W(I).
This pin is multiplexed between HPI, EMAC, PCI, and GPIO.
In HPI mode, this pin is host data strobe input 2 HDS2 (I).
(1) I = Input, O = Output, Z = High impedance, S = Supply voltage, GND = Ground, A = Analog signal
(2) IPD = Internal pulldown, IPU = Internal pullup. For more detailed information on pullup/pulldown resistors and situations where external
pullup/pulldown resistors are required, see Section 3.9.1, Pullup/Pulldown Resistors.
(3) Specifies the operating I/O supply voltage for each signal
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