ADS58J63_15 Datasheet, PDF (49/84 Pages) Texas Instruments – ADS58J63 Quad-Channel, 14-Bit, 500-MSPS Telecom Receiver Device

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7.6.3 Register Descriptions
7.6.3.1 Register 0h (offset = 0h) [reset = 0h]
Figure 91. Register 0h
A7-A0 in Hex
7
6
5
4
3
0
RESET
0
0
0
0
LEGEND: W = Write only; -n = value after reset
ADS58J63
SBAS717A – JUNE 2015 – REVISED JUNE 2015
2
1
0
0
0
RESET
Bit ⁽¹⁾
D7
Name
RESET
D0 RESET
Table 16. Register 0h Field Description
Type
R/W
Reset
0
R/W 0
Description
0 = Normal operation
1 = Internal software reset, clears back to 0
0 = Normal operation
1 = Internal software reset, clears back to 0
(1) Both bits (D7, D0) must be set simultaneously to exercise reset
7.6.3.2 Register 3h/4h (offset = 3h/4h) [reset = 0h]
Figure 92. Register 3h/4h
A7-A0 in Hex
7
6
5
4
3
2
1
0
3
JESD BANK PAGE SEL [7:0]
4
JESD BANK PAGE SEL [16:8]
LEGEND: W = Write only; -n = value after reset
Bit
D7 - D0
Name
JESD BANK PAGE SEL
Table 17. Register 3h/4h Field Description
Type Reset
R/W 0
Description
Program these bits to access desired page in JESD Bank
6100h = Interleaving Engine Page selected
6141h = Decimation Filter Page Selected
6800h = Main Digital Page Selected
6900h = JESD Digtial Page selected
6A00h = JESD Analog Page selected
7.6.3.3 Register 5h (offset = 5h) [reset = 0h]
Figure 93. Register 5h
A7-A0 in Hex
7
6
5
4
3
2
1
0
5
0
0
0
0
0
0
0
DIS
BROADCAST
LEGEND: W = Write only; -n = value after reset
Bit Name
D0 DIS BROADCAST
Table 18. Register 5h Field Description
Type Reset
R/W 0
Description
0 = Normal operation. Channel A and B are programmed as a pair. Channel
C and D are programmed as a pair.
1 = channel A and B can be individually programmed based on bit 'CH'.
Similarly channel C and D can be individually programmed based on bit
'CH'.
7.6.3.4 Register 11h (offset = 11h) [reset = 0h]
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