LM3S9792 Datasheet, PDF (480/1279 Pages) Texas Instruments – Stellaris® LM3S9792 Microcontroller

General-Purpose Timers
Register 20: GPTM Timer B Value (GPTMTBV), offset 0x054
When read, this register shows the current, free-running value of Timer B in all modes. Software
can use this value to determine the time elapsed between an interrupt and the ISR entry. When
written, the value written into this register is loaded into the GPTMBR register on the next clock
cycle. In Input Edge-Count mode, bits 23:16 contain the upper 8 bits of the count.
GPTM Timer B Value (GPTMTBV)
Timer0 base: 0x4003.0000
Timer1 base: 0x4003.1000
Timer2 base: 0x4003.2000
Timer3 base: 0x4003.3000
Offset 0x054
Type RW, reset 0x0000.FFFF
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
16
reserved
Type RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
Reset
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
TBVL
Type RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
Reset
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
Bit/Field
31:16
15:0
Name
reserved
TBVL
Type
RW
RW
Reset Description
0x0000
Software should not rely on the value of a reserved bit. To provide
compatibility with future products, the value of a reserved bit should be
preserved across a read-modify-write operation.
0xFFFF
GPTM Timer B Register
For 16-bit mode, writing this field loads the counter for Timer B. A read
returns the current value of GPTMTBR.
In 32-bit mode, writing this field loads the upper 16 bits of the GPTMAR,
and reads return the current value of the upper 16 bits of GPTMTAR.
480
June 14, 2010
Texas Instruments-Advance Information