TMS320DM6441_10 Datasheet, PDF (47/232 Pages) Texas Instruments – Digital Media System-on-Chip

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TMS320DM6441
Digital Media System-on-Chip
SPRS359D – SEPTEMBER 2006 – REVISED MARCH 2008
Table 3-23. PWM0, PWM1, PWM2 Terminal Functions
SIGNAL
TYPE ⁽¹⁾
NAME
NO.
PWM2/
B2/
GPIO47
A15 I/O/Z
PWM1/
R2/
GPIO46
B15 I/O/Z
PWM0/
GPIO45
C15 I/O/Z
OTHER ⁽²⁾
DV_DD18
DV_DD18
DV_DD18
DESCRIPTION
PWM2
This pin is multiplexed between PWM2, VPBE, and GPIO.
For PWM2, it is output PWM2.
PWM1
This pin is multiplexed between PWM1, VPBE, and GPIO.
For PWM1, it is output PWM1.
PWM0
This pin is multiplexed between PWM0 and GPIO.
For PWM0, it is output PWM0.
(1) I = Input, O = Output, Z = High impedance, S = Supply voltage, GND = Ground, A = Analog signal
(2) Specifies the operating I/O supply voltage for each signal
Table 3-24. ATA/CF Terminal Functions
SIGNAL
NAME
TYPE⁽¹⁾ OTHER^{(2) (3)}
NO.
DESCRIPTION
ATA/CF
SPI_EN1/
HDDIR/
GPIO42
B2 I/O/Z
DV_DD18
This pin is multiplexed between SPI, ATA, and GPIO.
For ATA, it is buffer direction control output HDDIR.
GPIO50/
ATA_CS0
J5
O
DV_DD18
This pin is multiplexed between GPIO and ATA/CF.
In ATA mode, it is ATA/CF chip select output ATA_CS0.
GPIO51/
ATA_CS1
H1
O
DV_DD18
This pin is multiplexed between GPIO and ATA/CF.
In ATA mode, it is ATA/CF chip select output ATA_CS1.
EM_R/W/
INTRQ/
H/W
G3
I
DV_DD18
This pin is multiplexed between EMIFA, ATA/CF, and HPI.
For ATA/CF, it is interrupt request input INTRQ.
EM_WAIT/
(RDY/BSY)/
IORDY/
F1
I
HRDY
IPU
DV_DD18
This pin is multiplexed between EMIFA (NAND/SmartMedia/xD), ATA/CF, and HPI.
For ATA/CF, it is IO Ready input IORDY.
EM_OE/
(RE)/
(IORD)/
DIOR/
HDS1
H4
O
DV_DD18
This pin is multiplexed between EMIFA (NAND/SmartMedia/xD), ATA/CF, and HPI.
For CF, it is read strobe output (IORD).
For ATA, it is read strobe output DIOR.
EM_WE
(WE)
(IOWR)/
DIOW/
HDS2
G2
O
DV_DD18
This pin is multiplexed between EMIFA (NAND/SmartMedia/xD), ATA/CF, and HPI.
For CF, it is write strobe output (IOWR).
For ATA, it is write strobe output DIOW.
DMACK/
UART_TXD1
H3
O
DV_DD18
This pin is multiplexed between ATA/CF and UART1.
For ATA/CF, it is DMA acknowledge output DMACK.
DMARQ/
UART_RXD1
G1
O
IPD
DV_DD18
This pin is multiplexed between ATA/CF and UART1.
For ATA/CF, it is DMA request DMARQ input.
(1) I = Input, O = Output, Z = High impedance, S = Supply voltage, GND = Ground, A = Analog signal
(2) IPD = Internal pulldown, IPU = Internal pullup. (To pull up a signal to the opposite supply rail, a 1-kΩ resistor should be used.)
(3) Specifies the operating I/O supply voltage for each signal
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