TLV320AIC3204 Datasheet, PDF (45/159 Pages) Texas Instruments – Ultra Low Power Stereo Audio Codec

TLV320AIC3204
www.ti.com
Ultra Low Power Stereo Audio Codec
SLOS602A – SEPTEMBER 2008 – REVISED OCTOBER 2008
5.8 ADC Decimation Filtering and Signal Processing
The TLV320AIC3204 ADC channel includes a built-in digital decimation filter to process the oversampled
data from the sigma-delta modulator to generate digital data at Nyquist sampling rate with high dynamic
range. The decimation filter can be chosen from three different types, depending on the required
frequency response, group delay and sampling rate.
5.8.1 Processing Blocks
The TLV320AIC3204 offers a range of processing blocks which implement various signal processing
capabilities along with decimation filtering. These processing blocks give users the choice of how much
and what type of signal processing they may use and which decimation filter is applied.
The choice between these processing blocks is part of the PowerTune strategy to balance power
conservation and signal-processing flexibility. Less signal-processing capability reduces the power
consumed by the device. Table 5-4 gives an overview of the available processing blocks of the ADC
channel and their properties. The Resource Class Column (RC) gives an approximate indication of power
consumption.
The signal processing blocks available are:
• First-order IIR
• Scalable number of biquad filters
• Variable-tap FIR filter
• AGC
The processing blocks are tuned for common cases and can achieve high anti-alias filtering or low-group
delay in combination with various signal processing effects such as audio effects and frequency shaping.
The available first order IIR, BiQuad and FIR filters have fully user programmable coefficients.
Processing
Blocks
PRB_R1
PRB_R2
PRB_R3
PRB_R4
PRB_R5
PRB_R6
PRB_R7
PRB_R8
PRB_R9
PRB_R10
PRB_R11
PRB_R12
PRB_R13
PRB_R14
PRB_R15
PRB_R16
PRB_R17
PRB_R18
Channel
Stereo
Stereo
Stereo
Right
Right
Right
Stereo
Stereo
Stereo
Right
Right
Right
Right
Stereo
Stereo
Right
Right
Right
Table 5-4. ADC Processing Blocks
Decimation
Filter
A
A
A
A
A
A
B
B
B
B
B
B
C
C
C
C
C
C
1st Order
IIR Available
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Number
BiQuads
0
5
0
0
5
0
0
3
0
0
3
0
0
5
0
0
5
0
FIR
No
No
25-Tap
No
No
25-Tap
No
No
20-Tap
No
No
20-Tap
No
No
25-Tap
No
No
25-Tap
Required
AOSR Value
128,64
128,64
128,64
128,64
128,64
128,64
64
64
64
64
64
64
32
32
32
32
32
32
Resource
Class
6
8
8
3
4
4
3
4
4
2
2
2
3
4
4
2
2
2
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Application Information
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