TMS320C6711D_15 Datasheet, PDF (44/109 Pages) Texas Instruments – FLOATING-POINT DIGITAL SIGNAL PROCESSOR

TMS320C6711D
FLOATINGĆPOINT DIGITAL SIGNAL PROCESSOR
SPRS292B − OCTOBER 2005 − REVISED JUNE 2006
interrupt sources and interrupt selector
The C67x DSP core on the device supports 16 prioritized interrupts, which are listed in Table 20. The highest
priority interrupt is INT_00 (dedicated to RESET) while the lowest priority is INT_15. The first four interrupts are
non-maskable and fixed. The remaining interrupts (4−15) are maskable and default to the interrupt source listed
in Table 20. However, their interrupt source may be reprogrammed to any one of the sources listed in Table 21
(Interrupt Selector). Table 21 lists the selector value corresponding to each of the alternate interrupt sources.
The selector choice for interrupts 4−15 is made by programming the corresponding fields (listed in Table 20)
in the MUXH (address 0x019C0000) and MUXL (address 0x019C0004) registers.
DSP
INTERRUPT
NUMBER
INT_00
INT_01
INT_02
INT_03
INT_04
INT_05
INT_06
INT_07
INT_08
INT_09
INT_10
INT_11
INT_12
INT_13
INT_14
INT_15
Table 20. DSP Interrupts
INTERRUPT
SELECTOR
CONTROL
REGISTER
DEFAULT
SELECTOR
VALUE
(BINARY)
−
−
−
−
−
−
−
−
MUXL[4:0]
00100
MUXL[9:5]
00101
MUXL[14:10]
00110
MUXL[20:16]
00111
MUXL[25:21]
01000
MUXL[30:26]
01001
MUXH[4:0]
00011
MUXH[9:5]
01010
MUXH[14:10]
01011
MUXH[20:16]
00000
MUXH[25:21]
00001
MUXH[30:26]
00010
DEFAULT
INTERRUPT
EVENT
RESET
NMI
Reserved
Reserved
GPINT4†
GPINT5†
GPINT6†
GPINT7†
EDMAINT
EMUDTDMA
SDINT
EMURTDXRX
EMURTDXTX
DSPINT
TINT0
TINT1
Table 21. Interrupt Selector
INTERRUPT
SELECTOR
VALUE
(BINARY)
INTERRUPT
EVENT
MODULE
00000
DSPINT
HPI
00001
TINT0
Timer 0
00010
TINT1
Timer 1
00011
00100
00101
00110
00111
SDINT
GPINT4†
GPINT5†
GPINT6†
GPINT7†
EMIF
GPIO
GPIO
GPIO
GPIO
01000
EDMAINT
EDMA
01001
EMUDTDMA
Emulation
01010
EMURTDXRX
Emulation
01011
EMURTDXTX
Emulation
01100
XINT0
McBSP0
01101
RINT0
McBSP0
01110
XINT1
McBSP1
01111
RINT1
McBSP1
10000
GPINT0
GPIO
† _{Interrupt Events GPINT4, GPINT5, GPINT6, and GPINT7 are outputs from the GPIO module (GP). They originate from the device pins}
GP[4](EXT_INT4), GP[5](EXT_INT5), GP[6](EXT_INT6), and GP[7](EXT_INT7). These pins can be used as edge-sensitive EXT_INTx
with polarity controlled by the External Interrupt Polarity Register (EXTPOL.[3:0]). The corresponding pins must first be enabled in the GPIO
module by setting the corresponding enable bits in the GP Enable Register (GPEN.[7:4]), and configuring them as inputs in the GP Direction
Register (GPDIR.[7:4]). These interrupts can be controlled through the GPIO module in addition to the simple EXTPOL.[3:0] bits. For more
information on interrupt control via the GPIO module, see the TMS320C6000 DSP General-Purpose Input/Output (GPIO) Reference Guide
(literature number SPRU584).
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