GC5330 Datasheet, PDF (44/49 Pages) Texas Instruments – Wideband Transmit-Receive Digital Signal Processors

GC5330
GC5337
SLWS226 B – DECEMBER 2010 – REVISED JANUARY 2011
www.ti.com
The TMS320C674x/OMAP-L1x Processor Peripherals Overview referencde guide (SPRUFK9) illustrates the
connections to the TMS320C6748 peripherals. The TMS320C674x/OMAP-L1x Processor External Memory
Interface A (EMIFA) user's guide (SPRUFL6) illustrates the connections to the EMIF A interface, and DSP timing.
It is recommended that if more than one EMIF-A load is connected to the DSP, buffering is used for the control
bus WE, RD, address bus, and data bus.
Related Material and Documents
The following documents are available through your TI Field Application Engineer FAE:
• GC5330 EVM schematic diagram
• GC5330 EVM layout diagram
• GC533x Baseband Application Note
• GC533x Baseband beAGC Application Note
• GC533x DDUC Application Note
• GC533x CFR Application Note
• GC533x DPD Application Note
• GC533x TX (BUC, DAC Interface) Application Note
• GC533x RX Application Note
• GC533x feAGC Application Note
• GC533x Sync, MPU Application Note
• GC533x Software Application Guide
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