THS7365 Datasheet, PDF (43/53 Pages) Texas Instruments – 6-Channel Video Amplifier with 3-SD and 3-HD Sixth-Order Filters and 6-dB Gain

THS7365
www.ti.com.................................................................................................................................................................................................. SBOS467 – MARCH 2009
EVALUATION MODULE
To evaluate the THS7365, an evaluation module
(EVM) is available. The EVM allows for testing the
THS7365 in many different configurations. Inputs and
outputs include BNC connectors commonly found in
video systems, along with 75-Ω input termination
resistors, 75-Ω series source termination resistors,
and 75-Ω characteristic impedance traces. Several
unpopulated component pads are found on the EVM
to allow for different input and output configurations
as dictated by the user. This EVM is designed to be
used with a single supply from 2.6 V up to 5 V.
The EVM default input configuration sets all channels
for dc input coupling. The input signal must be within
0 V to approximately 1.4 V for proper operation.
Failure to be within this range saturates and/or clips
the output signal. If the input range is beyond this, or
if the signal voltage is unknown, or coming from a
current sink DAC, then ac input configuration is
desired. This option is easily accomplished with the
EVM by simply replacing Z₁ through Z₆ 0-Ω resistors
with 0.1-µF capacitors.
For ac-coupled input and sync-tip clamp (STC)
functionality commonly used for CVBS, s-video Y',
component Y' signals, and R'G'B' signals with
embedded sync, no other changes are needed.
However, if a bias voltage is needed after the input
capacitor which is commonly needed for s-video C',
component P_'B and P'_R, and non-sync embedded
R'G'B' signals, then a pull-up resistor should be
added to the signal on the EVM. This configuration is
easily achieved by simply adding a resistor to any of
the following resistor pads; RX7 to RX12. A common
value to use is 3.3 MΩ. Note that even signals with
embedded sync can also use bias mode if desired.
The EVM default output configuration sets all
channels for ac output coupling. The 470-µF and
0.1-µF capacitors work well for most ac-coupled
systems. However, if dc-coupled output is desired,
then replacing the 0.1-µF capacitors (C20, C22, C24,
C26, C28, and/or C30) with 0-Ω resistors works well.
Removing the 470-µF capacitors is optional, but
removing them from the EVM eliminates a few
picofarads of stray capacitance on each signal path
which may be desirable.
The THS7365 incorporates an easy method to
configure the bypass modes and the disable modes.
The use of JP4 controls the SD channels disable
feature; JP6 controls the HD Channels disable
feature; JP3 controls the SD channels filter/bypass
mode; and JP5 controls the HD channels filter/bypass
mode. While there is a space on the EVM for JP1
and JP2, these are not used for the THS7365.
Connection of JP4 and JP6 to GND applies 0 V to the
disable pins and the THS7365 operates normally.
Moving JP4 to +V_S causes the THS7365 SD
channels to be in disable mode, while moving JP6 to
+V_S causes the THS7365 HD channels to be in
disable mode .
Connection of JP3 to GND places the THS7365 SD
channels in filter mode while moving JP3 to +V_S
places the THS7365 HD channels in bypass mode.
Connection of JP5 to GND places the THS7365 HD
channels in filter mode while moving JP5 to +V_S
places the THS7365 HD channels in bypass mode.
Figure 122 shows the EVM schematic. Figure 123
and Figure 124 illustrate the two layers of the EVM
PCB, incorporating standard high-speed layout
practices. Table 1 lists the bill of materials as the
board comes supplied from Texas Instruments.
Copyright © 2009, Texas Instruments Incorporated
Product Folder Link(s): THS7365
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