TMS320C6421 Datasheet, PDF (40/59 Pages) Texas Instruments – Fixed-Point Digital Signal Processor

TMS320C6421
Fixed-Point Digital Signal Processor
SPRS346A – JANUARY 2007 – REVISED MARCH 2007
Table 2-22. PWM0, PWM1, and PWM2 Terminal Functions
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SIGNAL
NAME
ZWT
NO.
ZDU
NO.
TYPE ⁽¹⁾
OTHER ^{(2) (3)}
DESCRIPTION
PWM2
CLKOUT0/PWM2/
GP[84]
M1
R1
I/O/Z
IPD
DV_DD33
This pin is multiplexed between the System Clock generator (PLL1),
PWM2, and GPIO.
For PWM2, this pin is output PWM2.
PWM1
GP[4]/PWM1
F3
F3
I/O/Z
IPD
DV_DD33
This pin is multiplexed between GPIO and PWM1.
For PWM1, this pin is output PWM1.
PWM0
URTS0/PWM0/
GP[88]
L3
M3
I/O/Z
IPU
DV_DD33
This pin is multiplexed between the UART0 (Flow Control), PWM0,
and GPIO.
For PWM0, this pin is output PWM0.
(1) I = Input, O = Output, Z = High impedance, S = Supply voltage, GND = Ground, A = Analog signal
(2) IPD = Internal pulldown, IPU = Internal pullup. For more detailed information on pullup/pulldown resistors and situations where external
pullup/pulldown resistors are required, see Section 3.2.1, Pullup/Pulldown Resistors.
(3) Specifies the operating I/O supply voltage for each signal
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