SN74CB3T16210 Datasheet, PDF (4/14 Pages) Texas Instruments – 2.5-V/3.3-V LOW-VOLTAGE BUS SWITCH WITH 5-V-TOLERANT LEVEL SHIFTER

SN74CB3T16210
20-BIT FET BUS SWITCH
2.5-V/3.3-V LOW-VOLTAGE BUS SWITCH WITH 5-V-TOLERANT LEVEL SHIFTER
SCDS156A – OCTOBER 2003 – REVISED MARCH 2005
SIMPLIFIED SCHEMATIC, EACH FET SWITCH (SW)
A
B
V_G(1)
Control
Circuit
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EN⁽²⁾
(1) Gate voltage (V_G) is equal to approximately V_CC + V_T when the switch is ON
and V_I > V_CC + V_T.
(2) EN is the internal enable signal applied to the switch.
Absolute Maximum Ratings⁽¹⁾
over operating free-air temperature range (unless otherwise noted)
V_CC
Supply voltage range
V_IN
Control input voltage range⁽²⁾⁽³⁾
V_I/O
Switch I/O voltage range^(2)(3)(4)
I_IK
Control input clamp current
I_I/OK
I/O port clamp current
I_IO
ON-state switch current⁽⁵⁾
Continuous current through V_CC or GND
θ_JA
Package thermal impedance⁽⁶⁾
T_stg
Storage temperature range
V_IN < 0
V_I/O < 0
DGG package
DGV package
MIN MAX
–0.5
7
–0.5
7
–0.5
7
–50
–50
±128
±100
70
58
–65 150
UNIT
V
V
V
mA
mA
mA
mA
°C/W
°C
(1) Stresses beyond those listed under "absolute maximum ratings" may cause permanent damage to the device. These are stress ratings
only, and functional operation of the device at these or any other conditions beyond those indicated under "recommended operating
conditions" is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
(2) All voltages are with respect to ground unless otherwise specified.
(3) The input and output voltage ratings may be exceeded if the input and output clamp-current ratings are observed.
(4) V_I and V_O are used to denote specific conditions for V_I/O.
(5) I_I and I_O are used to denote specific conditions for I_I/O.
(6) The package thermal impedance is calculated in accordance with JESD 51-7.
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