LP38502-ADJ Datasheet, PDF (4/27 Pages) Texas Instruments – LP3850x-ADJ, LP3850xA-ADJ 1.5-A Flexcap Low-Dropout Linear Regulatorfor 2.7-V to 5.5-V Inputs

LP38500-ADJ, LP38502-ADJ
SNVS539G – NOVEMBER 2007 – REVISED JUNE 2015
www.ti.com
6 Specifications
6.1 Absolute Maximum Ratings
over operating free-air temperature range (unless otherwise noted)⁽¹⁾⁽²⁾
Input pin voltage (survival)
Enable pin voltage (survival)
Output pin voltage (survival)
I_OUT (survival)
Power dissipation⁽³⁾
Storage temperature, T_stg
MIN
MAX
−0.3
6
−0.3
6
−0.3
6
Internally limited
Internally limited
−65
150
UNIT
V
V
V
°C
(1) Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings
only, which do not imply functional operation of the device at these or any other conditions beyond those indicated under Recommended
Operating Conditions. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
(2) If Military/Aerospace specified devices are required, please contact the Texas Instruments Office/ Distributors for availability and
specifications.
(3) Operating junction temperature must be evaluated, and derated as needed, based on ambient temperature (T_A), power dissipation (P_D),
maximum allowable operating junction temperature (T_J(MAX)), and package thermal resistance (R_θJA). See Application and
Implementation.
6.2 ESD Ratings
V_ESD Electrostatic discharge
Human body model (HBM), per ANSI/ESDA/JEDEC JS-001, all pins⁽¹⁾
VALUE
±2000
UNIT
V
(1) JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process. have higher
performance.
6.3 Recommended Operating Conditions
over operating free-air temperature range (unless otherwise noted)⁽¹⁾
Input supply voltage
Enable input voltage
Output current (DC)
V_OUT
Junction temperature⁽¹⁾
MIN
NOM
MAX UNIT
2.7
5.5
V
0
5.5
V
0
1.5
A
0.6
5
V
−40
125
°C
(1) Operating junction temperature must be evaluated, and derated as needed, based on ambient temperature (T_A), power dissipation (P_D),
maximum allowable operating junction temperature (T_J(MAX)), and package thermal resistance (R_θJA). See Application and
Implementation.
6.4 Thermal Information
THERMAL METRIC⁽¹⁾
LP38500 and LP38502
KTT(DDPAK/TO-263) NDQ (TO-263) NGS (WSON)
UNIT
5 PINS
5 PINS
8 PINS
R_θJA
R_θJC(top)
R_θJB
ψ_JT
ψ_JB
R_θJC(bot)
Junction-to-ambient thermal resistance
Junction-to-case (top) thermal resistance
Junction-to-board thermal resistance
Junction-to-top characterization parameter
Junction-to-board characterization parameter
Junction-to-case (bottom) thermal resistance
40.3
33.3
52.5
°C/W
43.4
22.1
53.6
°C/W
23.1
16.9
26.1
°C/W
11.5
5.8
0.6
°C/W
22.1
16.8
26.3
°C/W
1
2.3
7.4
°C/W
(1) For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics application
report, SPRA953.
4
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