LP38502-ADJ Datasheet, PDF (15/27 Pages) Texas Instruments – LP3850x-ADJ, LP3850xA-ADJ 1.5-A Flexcap Low-Dropout Linear Regulatorfor 2.7-V to 5.5-V Inputs

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LP38500-ADJ, LP38502-ADJ
SNVS539G – NOVEMBER 2007 – REVISED JUNE 2015
In applications where the load is switching at high speed, the output of the device may need RF isolation from
the load. In such cases, it is recommended that some inductance be placed between the output capacitor and
the load, and good RF bypass capacitors be placed directly across the load. PCB layout is also critical in high
noise environments, since RFI/EMI is easily radiated directly into PC traces. Noisy circuitry should be isolated
from clean circuits where possible, and grounded through a separate path. At MHz frequencies, ground planes
begin to look inductive and RFI/EMI can cause ground bounce across the ground plane. In multi-layer PC Board
applications, care should be taken in layout so that noisy power and ground planes do not radiate directly into
adjacent layers which carry analog power and ground.
8.2.2.6 Output Noise
Noise is specified in two ways:
• Spot noise or output noise density is the RMS sum of all noise sources, measured at the regulator output, at
a specific frequency (measured with a 1-Hz bandwidth). This type of noise is usually plotted on a curve as a
function of frequency.
• Total output noise or broadband noise is the RMS sum of spot noise over a specified bandwidth, usually
several decades of frequencies.
Spot noise is measured in units µV/√Hz or nV/√Hz and total output noise is measured in µ_V(rms). The primary
source of noise in low-dropout regulators is the internal reference. In CMOS regulators, noise has a low-
frequency component and a high frequency component, which depend strongly on the silicon area and quiescent
current.
Noise can generally be reduced in two ways: increase the transistor area or increase the reference current.
However, enlarging the transistors will increase die size, and increasing the reference current means higher total
supply current (ground pin current).
8.2.3 Application Curves
Figure 20. Turnon Time
Figure 21. Turnon Time
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