CD54HC132_07 Datasheet, PDF (4/15 Pages) Texas Instruments – High-Speed CMOS Logic Quad 2-Input NAND Schmitt Trigger

CD54HC132, CD74HC132, CD54HCT132, CD74HCT132
DC Electrical Specifications (Continued)
TEST
CONDITIONS
25^oC
-40^oC TO 85^oC -55^oC TO 125^oC
PARAMETER
Input Leakage
Current
SYMBOL V_I (V) I_O (mA) V_CC (V) MIN TYP MAX MIN
MAX
MIN
MAX UNITS
I_I
V_CC or
-
GND
6
-
- ±0.1
-
±1
-
±1
µA
Quiescent Device
Current
I_CC
V_CC or
0
6
-
-
2
-
20
-
40
µA
GND
HCT TYPES
Input Switch Points
V_T+
-
(Note 2)
-
4.5 1.2 - 1.9 1.2
1.9
1.2
1.9
V
5.5 1.4 - 2.1 1.4
2.1
1.4
2.1
V
V_T-
-
-
4.5 0.5 - 1.2 0.5
1.2
0.5
1.2
V
5.5 0.6 - 1.4 0.6
1.4
0.6
1.4
V
V_H
-
-
4.5 0.4 - 1.4 0.4
1.4
0.4
1.4
V
5.5 0.4 - 1.5 0.4
1.5
0.4
1.5
V
High Level Output
Voltage
CMOS Loads
-
V_T+ _or -0.02
4.5
4.4
-
-
4.4
-
4.4
-
V
V_T-
High Level Output
Voltage
TTL Loads
-4
4.5 3.98 -
-
3.84
-
3.7
-
V
Low Level Output
V_OL
V_T+ _or 0.02
4.5
-
- 0.1
-
0.1
-
Voltage CMOS Loads
V_T-
Low Level Output
Voltage
TTL Loads
4
4.5
-
- 0.26
-
0.33
-
0.1
V
0.4
V
Input Leakage
Current
I_I
V_CC
-
5.5
-
- ±0.1
-
±1
-
±1
µA
and
GND
Quiescent Device
Current
I_CC
V_CC or
0
5.5
-
-
2
-
20
-
40
µA
GND
Additional Quiescent
∆I_CC
V_CC
-
4.5 to - 100 360
-
450
-
490
µA
Device Current Per
(Note 3) - 2.1
5.5
Input Pin: 1 Unit Load
NOTES:
2. Hysteresis definition, characteristic and test setup see Test Circuits and Waveforms
3. For dual-supply systems theoretical worst case (V_I = 2.4V, V_CC = 5.5V) specification is 1.8mA.
4