CD54HC132_07 Datasheet, PDF (3/15 Pages) Texas Instruments – High-Speed CMOS Logic Quad 2-Input NAND Schmitt Trigger

CD54HC132, CD74HC132, CD54HCT132, CD74HCT132
Absolute Maximum Ratings
DC Supply Voltage, V_CC . . . . . . . . . . . . . . . . . . . . . . . . -0.5V to 7V
DC Input Diode Current, I_IK
For V_I < -0.5V or V_I > V_CC + 0.5V . . . . . . . . . . . . . . . . . . . . . .±20mA
DC Output Diode Current, I_OK
For V_O < -0.5V or V_O > V_CC + 0.5V . . . . . . . . . . . . . . . . . . . .±20mA
DC Output Source or Sink Current per Output Pin, I_O
For V_O > -0.5V or V_O < V_CC + 0.5V . . . . . . . . . . . . . . . . . . . .±25mA
DC V_CC or Ground Current, I_{CC or} I_GND . . . . . . . . . . . . . . . . . .±50mA
Thermal Information
Thermal Resistance (Typical, Note 1)
θ_JA (^oC/W)
E (PDIP) Package . . . . . . . . . . . . . . . . . . . . . . . . . .
80
M (SOIC) Package. . . . . . . . . . . . . . . . . . . . . . . . . .
86
Maximum Junction Temperature . . . . . . . . . . . . . . . . . . . . . . . 150^oC
Maximum Storage Temperature Range . . . . . . . . . .-65^oC to 150^oC
Maximum Lead Temperature (Soldering 10s) . . . . . . . . . . . . . 300^oC
(SOIC - Lead Tips Only)
Operating Conditions
Temperature Range (T_A) . . . . . . . . . . . . . . . . . . . . . -55^oC to 125^oC
Supply Voltage Range, V_CC
HC Types . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .2V to 6V
HCT Types . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .4.5V to 5.5V
DC Input or Output Voltage, V_I, V_O . . . . . . . . . . . . . . . . . 0V to V_CC
CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation
of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied.
NOTE:
1. The package thermal impedance is calculated in accordance with JESD 51-7.
DC Electrical Specifications
TEST
CONDITIONS
25^oC
-40^oC TO 85^oC -55^oC TO 125^oC
PARAMETER
HC TYPES
SYMBOL V_I (V) I_O (mA) V_CC (V) MIN TYP MAX MIN
MAX
MIN
MAX UNITS
Input Switch Points
V_T+
-
(Note 2)
-
2
0.7 - 1.5 0.7
1.5
0.7
1.5
V
4.5 1.7 - 3.15 1.7
3.15
1.7
3.15
V
6
2.1 - 4.2 2.1
4.2
2.1
4.2
V
V_T-
-
-
2
0.3 -
1
0.3
1
0.3
1
V
4.5 0.9 - 2.2 0.9
2.2
0.9
2.2
V
6
1.2 -
3
1.2
3
1.2
3
V
V_H
2
0.2 -
1
0.2
1
0.2
1
V
4.5 0.4 - 1.4 0.4
1.4
0.4
1.4
V
6
0.6 - 1.6 0.6
1.6
0.6
1.6
V
High Level Output
Voltage
CMOS Loads
V_OH
V_T+ or -0.02
2
1.9 -
-
1.9
-
1.9
-
V
V_T-
-0.02
4.5
4.4
-
-
4.4
-
4.4
-
V
-0.02
6
5.9 -
-
5.9
-
5.9
-
V
High Level Output
Voltage
TTL Loads
-4
4.5 3.98 -
-
3.84
-
3.7
-
V
-5.2
6
5.48 -
-
5.34
-
5.2
-
V
Low Level Output
Voltage
CMOS Loads
V_OL
V_T+ or 0.02
2
-
- 0.1
-
0.1
-
0.1
V
V_T-
0.02
4.5
-
- 0.1
-
0.1
-
0.1
V
0.02
6
-
- 0.1
-
0.1
-
0.1
V
Low Level Output
Voltage
TTL Loads
4
4.5
-
- 0.26
-
0.33
-
5.2
6
-
- 0.26
-
0.33
-
0.4
V
0.4
V
3