CD54ACT112_08 Datasheet, PDF (4/13 Pages) Texas Instruments – DUAL J-K NEGATIVE-EDGE-TRIGGERED FLIP-FLOPS WITH CLEAR AND PRESET

CD54ACT112, CD74ACT112
DUAL J-K NEGATIVE-EDGE-TRIGGERED FLIP-FLOPS
WITH CLEAR AND PRESET
SCHS323 – JANUARY 2003
switching characteristics over recommended operating free-air temperature range,
V_CC = 5 V ± 0.5 V, C_L = 50 pF (unless otherwise noted) (see Figure 1)
PARAMETER
FROM
(INPUT)
TO
(OUTPUT)
–55°C to
125°C
MIN MAX
–40°C to
85°C
MIN MAX
fmax
tPLH
CLK
CLR or PRE
Q or Q
100
114
2.6 10.3 2.7
9.4
3.1 12.2 3.2 11.1
tPHL
CLK
CLR or PRE
Q or Q
2.6 10.3 2.7
9.4
3.1 12.2 3.2 11.1
UNIT
MHz
ns
ns
operating characteristics, V_CC = 5 V, T_A = 25°C
PARAMETER
Cpd
Power dissipation capacitance
TYP UNIT
56
pF
4
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