BQ4845 Datasheet, PDF (4/22 Pages) Texas Instruments – Parallel RTC With CPU Supervisor

bq4845/bq4845Y
Address Map
The bq4845 provides 16 bytes of clock and control status
registers. Table 1 is a map of the bq4845 registers, and
Table 2 describes the register bits.
Clock Memory Interface
The bq4845 has the same interface for clock/calendar
and control information as standard SRAM. To read and
write to these locations, the user must put the bq4845 in
the proper mode and meet the timing requirements.
Read Mode
The bq4845 is in read mode whenever OE (Output en-
able) is low and CS (chip select) is low. The unique ad-
dress, specified by the 4 address inputs, defines which
one of the 16 clock/calendar bytes is to be accessed. The
bq4845 makes valid data available at the data I/O pins
within tAA (address access time). This occurs after the
last address input signal is stable, and providing the CS
and OE (output enable) access times are met. If the CS
and OE access times are not met, valid data is available
after the latter of chip select access time (tACS) or output
enable access time (tOE).
CS and OE control the state of the eight three-state
data I/O signals. If the outputs are activated before tAA,
Ad-
dress
(h)
0
1
2
3
4
5
6
7
8
9
A
B
C
D
E
F
D7
0
ALM1
0
ALM1
PM/AM
ALM1
PM/AM
0
ALM1
0
0
*
*
*
*
*
Table 1. bq4845 Clock and Control Register Map
D6
D5
D4
10-second digit
ALM0
10-second digit
10-minute digit
ALM0
10-minute digit
0
10-hour digit
D3 D2
D1
1-second digit
1-second digit
1-minute digit
1-minute digit
1-hour digit
12-Hour
D0
Range (h)
Register
00–59
Seconds
00–59
Seconds alarm
00–59
Minutes
00–59
Minutes alarm
01–12 AM/ 81– 92 PM Hours
ALM0 10-hour digit
1-hour digit
01–12 AM/ 81–92 PM Hours alarm
0
10-day digit
ALM0 10-day digit
0
0
0
0 10 mo.
10-year digit
1-day digit
1-day digit
Day-of-week digit
1-month digit
1-year digit
WD2
WD1 WD0 RS3
*
AIE
RS2 RS1 RS0
PIE PWRIE ABE
*
AF PF PWRF BVF
*
UTI STOP 24/12 DSE
*
*
*
*
*
*
*
01–31
01–31
01–07
01–12
00–99
Day
Day alarm
Day-of-week
Month
Year
Programmable
rates
Interrupt en-
ables
Flags
Control
Unused
Notes:
* = Unused bits; unwritable and read as 0.
0 = should be set to 0 for valid time/calendar range.
Clock calendar data in BCD. Automatic leap year adjustment.
PM/AM = 1 for PM; PM/AM = 0 for AM.
DSE = 1 enables daylight savings adjustment.
24/12 = 1 enables 24-hour data representation; 24/12 = 0 enables 12-hour data representation.
Day-of-Week coded as Sunday = 1 through Saturday = 7.
BVF = 1 for valid battery.
STOP = 1 turns the RTC on; STOP = 0 stops the RTC in back-up mode.
Aug. 1995
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