ADS62P49_1 Datasheet, PDF (39/77 Pages) Texas Instruments – Dual Channel 14-/12-Bit, 250-/210-MSPS ADC With DDR LVDS and Parallel CMOS Outputs

ADS62P49 / ADS62P29
ADS62P48 / ADS62P28
www.ti.com............................................................................................................................................................. SLAS635A – APRIL 2009 – REVISED JUNE 2009
TYPICAL CHARACTERISTICS – ADS62P48
All plots are at 25°C, AVDD = 3.3 V, DRVDD = 1.8 V, maximum rated sampling frequency, sine wave input clock. 1.5 V_PP
differential clock amplitude, 50% clock duty cycle, –1 dBFS differential analog input, internal reference mode, 0 dB gain,
LVDS output interface, 32K point FFT (unless otherwise noted)
FFT FOR 20 MHz INPUT SIGNAL
0
SFDR = 84.1 dBc
−20
SINAD = 73.1 dBFS
SNR = 73.4 dBFS
THD = 83.5 dBc
−40
−60
−80
−100
−120
−140
0
20
40
60
80
f − Frequency − MHz
Figure 32.
100
G018
FFT FOR 300 MHz INPUT SIGNAL
0
SFDR = 70.1 dBc
−20
SINAD = 66 dBFS
SNR = 68.8 dBFS
THD = 68.2 dBc
−40
−60
−80
−100
−120
−140
0
20
40
60
80
f − Frequency − MHz
Figure 34.
100
G020
FFT FOR 2-TONE INPUT SIGNAL
0
f_IN1 = 185 MHz, –36 dBFS
−20
f_IN2 = 190 MHz, –36 dBFS
2-Tone IMD = –107.1 dBFS
SFDR = –98.8 dBc
−40
−60
−80
−100
−120
−140
0
20
40
60
80
f − Frequency − MHz
Figure 36.
100
G022
0
−20
−40
−60
−80
−100
−120
−140
0
0
−20
−40
−60
−80
−100
−120
−140
0
92
FFT FOR 170 MHz INPUT SIGNAL
SFDR = 77.4 dBc
SINAD = 70.1 dBFS
SNR = 70.9 dBFS
THD = 77 dBc
20
40
60
80
f − Frequency − MHz
Figure 33.
100
G019
FFT FOR 2-TONE INPUT SIGNAL
f_IN1 = 185 MHz, –7 dBFS
f_IN2 = 190 MHz, –7 dBFS
2-Tone IMD = –84.7 dBFS
SFDR = –97.2 dBc
20
40
60
80
f − Frequency − MHz
Figure 35.
SFDR vs INPUT FREQUENCY
100
G021
88
84
80
76
72
68
0
50 100 150 200 250 300 350 400 450 500
f_IN − Input Frequency − MHz
G023
Figure 37.
Copyright © 2009, Texas Instruments Incorporated
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